Semiconductor device having four power MOSFETs constituting H bridge circuit
AssigneeNEC Corporation
InventorYukio Itoh
Life of this patent
Estimating the term…
Abstract
A semiconductor device including first, second, third and fourth MOSFETs constituting an H bridge circuit. Each of the first and second MOSFETs is a vertical DMOSFET and each of the third and fourth MOSFETs is a lateral DMOSFET having a surface diffusion region formed in a portion of a drain region. The surface diffusion region has a conductivity type opposite that of a source region of the lateral DMOSFET and is electrically connected to the source region. Each of the surface diffusion regions may be made of a part of a channel stop region formed under a field insulator film. Each of the third and fourth MOSFETs may be a lateral DMOSFET having no surface diffusion region. Low on-resistance and small chip size of the device are obtained.
Claims7
A semiconductor device comprising:
- first, second, third and fourth MOSFETs formed in a semiconductor substrate;
- drains of said first and second MOSFETs being coupled together;
- sources of said third and fourth MOSFETs being coupled together;
- a source of said first MOSFET being connected to a drain of said third MOSFET;
- a source of said second MOSFET being connected to a drain of said fourth MOSFET;
- and
- said first, second, third and fourth MOSFETs constituting an H bridge circuit;
- wherein said first and second MOSFETS are different in structure from said third and fourth MOSFETs.
A semiconductor device comprising:
- (a) first, second, third and fourth MOSFETs formed in a semiconductor substrate of a first conductivity type;
- a field insulating film formed on a first surface of said substrate to laterally isolate said first, second, third and fourth MOSFETs;
- drains of said first and second MOSFETs being coupled together;
- sources of said third and fourth MOSFETs being coupled together;
- a source of said first MOSFET being connected to a drain of said third MOSFET;
- a source of said second MOSFET being connected to a drain of said fourth MOSFET;
- and
- said first, second, third and fourth MOSFETs constituting an H bridge circuit;
- (b) each of said first and second MOSFETs being a vertical DMOSFET and each of said third and fourth MOSFETs being a lateral DMOSFET having a surface diffusion region formed in a portion of a drain region of said third and fourth MOSFETS;
- (c) said vertical DMOSFET having;
- a base region of a second conductivity type formed in said substrate, said second conductivity type being opposite to said first conductivity type;
- a source region of said first conductivity type formed in said base region;
- a gate insulator film formed on a first surface of said substrate;
- a gate electrode formed on said gate insulator film;
- a source electrode in contact with said source region;
- a drain electrode formed on a second surface of said substrate;
- (d) said lateral DMOSFET having;
- a well region of a second conductivity type formed in said substrate, said second conductivity type being opposite to said first conductivity type;
- a base region of said second conductivity type formed in said well region;
- a source region of said first conductivity type formed in said base region;
- a drain region of said first conductivity type formed in said well region;
- a surface diffusion region of said second conductivity type formed in said drain region;
- a gate insulator film formed on a first surface of said substrate;
- a gate electrode formed on said gate insulator film;
- a source electrode in contact with said source region;
- a drain electrode in contact with said drain region;
- said surface diffusion region being electrically connected to said source region.
A semiconductor device comprising:
- (a) first, second, third and fourth MOSFETs formed in a semiconductor substrate of a first conductivity type;
- a field insulating film formed on a first surface of said substrate to laterally isolate said first, second, third and fourth MOSFETS;
- drains of said first and second MOSFETs being coupled together;
- sources of said third and fourth MOSFETs being coupled together;
- a source of said first MOSFET being connected to a drain of said third MOSFET;
- a source of said second MOSFET being connected to a drain of said fourth MOSFET;
- and
- said first, second, third and fourth MOSFETs constituting an H bridge circuit;
- (b) each of said first and second MOSFETs being a vertical DMOSFET and each of said third and fourth MOSFETs being a lateral DMOSFET having a surface diffusion region formed in a portion of said a drain region of said third and fourth MOSFETs;
- (c) said vertical DMOSFET having;
- a base region of a second conductivity type formed in said substrate, said second conductivity type being opposite to said first conductivity type;
- a source region of said first conductivity type formed in said base region;
- a gate insulator film formed on said first surface of said substrate;
- a gate electrode formed on said gate insulator film;
- a source electrode in contact with said source region;
- and
- a drain electrode formed on a second surface of said substrate;
- and
- (d) said lateral DMOSFET having;
- a well region of said second conductivity type formed in said substrate;
- a base region of said second conductivity type formed in said well region;
- a source region of said first conductivity type formed in said base region;
- a drain region of said first conductivity type formed in said well region;
- a gate insulator film formed on said first surface of said substrate;
- a gate electrode formed on said gate insulator film;
- a source electrode in contact with said source region;
- and
- a drain electrode in contact with said drain region.
Dependencies are inferred from the claim text.