# US 5,703,361 A · Circuit scanning device and method

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- Number: US 5,703,361 A
- Document ID: US5703361A
- Status: Granted
- Kind: A
- Application number: 08/649,826
- Filed: 1996-04-30
- Granted: 1997-12-30
- Earliest claimed: 1996-04-30
- Assignees: The United States of America as represented by the Secretary of the Army
- Inventors: Richard G. Sartore
- Web page: https://patentgrep.com/patent/US5703361A

## CPC

- H01J 37/256: using scanning beams
- G01N 23/2252: Measuring emitted X-rays, e.g. electron probe microanalysis [EPMA]
- G01R 31/307: of integrated circuits
- H01J 2237/24415: X-ray
- H01J 2237/24592: Inspection and quality control of devices
- H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H)
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

A circuit scanning device for use in mapping the lateral dimensions and positions of a conductive layer of an integrated circuit is provided. The device includes a scan control, a scanning electron microscope, an x-ray detector, a map maker, an algorithm storage unit, and an algorithm selector whereby an IC chip is irradiated with an electron beam, which is raster scanned across the IC chip. The x-ray radiation emission is then monitored and the electron beam is adjusted so as to produce an enhanced map of the conductive layers on the IC chip.

## Claims

### Claim 1

A method for mapping the overall layout and lateral dimensions of a conductive layer in an integrated circuit having a body of substrate material that includes a surface on which the conductive layer is disposed and having a coating of an insulation material disposed thereover; the conductive layer, body of substrate material and insulation material each having different x-ray radiation output in response to electron irradiation inputs, the method comprising the steps of;
scanning an area of interest on the integrated circuit with a beam of electrons having the energy level thereof adjusted to irradiate both the insulation material and the conductive layer;
monitoring x-ray radiation synchronously with the scanning, at X-Y pixel locations within the area of interest;
storing a first map of the x-ray radiation monitored at each X-Y pixel location during the scanning;
rescanning the area of interest with a beam of electrons having the energy level thereof adjusted to irradiate the insulation material only;
monitoring the x-ray radiation synchronously with the rescanning, at the X-Y pixel locations;
storing a second map of the x-ray radiation monitored at each X-Y pixel location during the rescanning;
subtracting the x-ray radiation monitored at each X-Y pixel location for the second map from the x-ray radiation monitored at each X-Y pixel location for the first map, to derive a third map from the x-ray radiation that relates to only the conductive layer at each X-Y pixel location.