# US 5,702,981 A · Method for forming a via in a semiconductor device

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- Number: US 5,702,981 A
- Document ID: US5702981A
- Status: Granted
- Kind: A
- Application number: 08/536,537
- Filed: 1995-09-29
- Granted: 1997-12-30
- Earliest claimed: 1995-09-29
- Inventors: Papu D. Maniar; Roc Blumenthal; Jeffrey L. Klein; Wei Wu
- Web page: https://patentgrep.com/patent/US5702981A

## CPC

- H10W 20/081: {by forming openings in the dielectric parts}
- H10W 20/077: {on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence)}
- Y10S 438/97: Specified etch stop material
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

A method for forming vias in a semiconductor device improves the resistance and reliability of contacts formed by use of an etch stop layer during the via formation process. An etch stop layer (40), preferably a silicon nitride or aluminum nitride layer, is deposited over conductive interconnect (34). A via (44) is etched in interlayer dielectric (42), stopping on etch stop layer (40). Etch stop layer (40) is then anisotropicly etched to expose the top of conductive interconnect (34), while maintaining a portion of the etch stop layer along a sidewall of the interconnect, and particularly along those sidewall portions which contain aluminum. A conductive plug (54) is then formed in the via, preferably using one or more barrier or glue layers (50). Formation of a tungsten plug using tungsten hexafluoride can then be performed without unwanted reactions between the tungsten source gas and the aluminum interconnect.

## Claims

### Claim 1

A method for making a semiconductor device comprising the steps of:
providing a semiconductor substrate having a conductive interconnect, the conductive interconnect having a top surface and a sidewall;
depositing a blanket etch stop layer over the semiconductor substrate and adjacent the sidewall of the conductive interconnect;
depositing a dielectric layer on the blanket etch stop layer;
etching a via in the dielectric layer over the conductive interconnect using a dry etch chemistry, and stopping on the blanket etch stop layer to create an exposed portion of the blanket etch stop layer;
removing the exposed portion of the blanket etch stop layer within the via while maintaining a sidewall portion of the blanket etch stop layer adjacent the sidewall of the conductive interconnect; and
filling the via with a conductive material using a gaseous source which includes fluorine to establish an electrical contact to the conductive interconnect without exposing the sidewall of the conductive interconnect to the gaseous source.

### Claim 2 (depends on 1)

The method of claim 1 wherein the step of etching comprises etching a via over the conductive interconnect which overhangs the sidewall of the conductive interconnect and exposes the sidewall portion of the blanket etch stop layer.

### Claim 3 (depends on 1)

The method of claim 1 wherein the step of providing a semiconductor substrate comprises providing a semiconductor substrate wherein the conductive interconnect is made at least in part of aluminum, and wherein the step of removing comprises removing the exposed portion of the blanket etch stop layer without exposing aluminum along the sidewall of the conductive interconnect.

### Claim 4 (depends on 3)

The method of claim 3 wherein the step of filling comprises filling the via with tungsten using tungsten hexafluoride.

### Claim 5 (depends on 3)

The method of claim 3 wherein the step of providing a semiconductor substrate comprises providing a semiconductor substrate wherein the top surface of the conductive interconnect has an overlying titanium nitride cap.

### Claim 6 (depends on 5)

The method of claim 5 further comprising the step of removing the overlying titanium nitride cap prior to filling the via.

### Claim 7

A method for making a semiconductor device comprising the steps of:
providing a semiconductor substrate having a conductive interconnect with a sidewall;
depositing a blanket dielectric nitride layer over the semiconductor substrate, over the conductive interconnect, and along the sidewall of the conductive interconnect;
depositing an oxide layer on the blanket dielectric nitride layer;
dry etching the oxide layer to form a via over the conductive interconnect, using the blanket dielectric nitride layer as an etch stop;
etching the blanket dielectric nitride layer to remove portions of the blanket dielectric nitride layer within the via, wherein etching the blanket dielectric nitride layer is performed anisotropically to maintain a portion of the blanket dielectric nitride layer along the sidewall of the conductive interconnect; and
chemically vapor depositing a conductive material in the via using a source gas comprised of fluorine to make electrical contact to the conductive interconnect, wherein the portion of the blanket dielectric nitride layer along the sidewall of the conductive interconnect shields the conductive interconnect from exposure to fluorine from the source gas.

### Claim 8 (depends on 7)

The method of claim 7 wherein the step of providing a semiconductor substrate comprises providing a semiconductor substrate wherein the conductive interconnect is comprised of aluminum.

### Claim 9 (depends on 8)

The method of claim 8 wherein the step of depositing a blanket dielectric nitride layer comprises depositing an aluminum nitride layer.

### Claim 10 (depends on 8)

The method of claim 8 wherein the step of depositing a blanket dielectric nitride layer comprises depositing a silicon nitride layer.

### Claim 11 (depends on 10)

The method of claim 10 wherein the step of depositing a conductive material comprises depositing tungsten using a tungsten source gas.

### Claim 12

A method for making a semiconductor device comprising the steps of:
providing a semiconductor substrate;
depositing a metal layer over the semiconductor substrate;
patterning and etching the metal layer to form a conductive interconnect having a base portion and a cap, the conductive interconnect also having a sidewall;
forming a dielectric nitride layer over the conductive interconnect and immediately adjacent the sidewall of the conductive interconnect;
forming a dielectric layer on the dielectric nitride layer;
dry etching a via in the dielectric layer, the via overlying a portion of the conductive interconnect and exposing a portion of the dielectric nitride layer, without exposing the conductive interconnect;
selectively removing the dielectric nitride layer exposed within the via while maintaining a portion of the dielectric nitride layer adjacent the sidewall of the conductive interconnect; and
depositing a conductive material in the via using a source gas of the conductive material which includes fluorine, wherein during deposition, the sidewall of the conductive interconnect is protected from exposure to fluorine by the portion of dielectric nitride layer.

### Claim 13 (depends on 12)

The method of claim 12 wherein the step of depositing a metal layer comprises depositing a metal layer comprising aluminum.

### Claim 14 (depends on 13)

The method of claim 13 further comprising the step of forming a capping layer over the metal layer and as part of the metal interconnect.

### Claim 15 (depends on 14)

The method of claim 14 further comprising the step of removing the capping layer within the via.

### Claim 16 (depends on 14)

The method of claim 14 wherein the step of forming a dielectric nitride layer comprises forming a silicon nitride layer.

### Claim 17 (depends on 16)

The method of claim 16 wherein the step of depositing a conductive material comprises depositing tungsten.

### Claim 18 (depends on 17)

The method of claim 17 wherein the step of depositing a conductive material comprises depositing a barrier layer in the via prior to depositing tungsten, wherein the barrier layer covers a top surface of the conductive interconnect during deposition of tungsten, wherein the barrier layer protects the top surface of the conductive interconnect from exposure to fluorine during deposition of the conductive material.

### Claim 19 (depends on 16)

The method of claim 16 wherein the step of depositing a conductive material comprises depositing tungsten by chemical vapor deposition using a gaseous source of tungsten hexafluoride.

### Claim 20 (depends on 12)

The method of claim 12 wherein the step of depositing a dielectric layer is performed prior to any etching the dielectric nitride layer.