# US 5,700,626 A · Method for forming multi-layer resist pattern

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- Number: US 5,700,626 A
- Document ID: US5700626A
- Status: Granted
- Kind: A
- Application number: 08/673,476
- Filed: 1996-07-01
- Granted: 1997-12-23
- Earliest claimed: 1994-01-12
- Assignees: LG Semicon Co., Ltd.
- Inventors: Jun Seok Lee; Hun Hur; Young Jin Song
- Web page: https://patentgrep.com/patent/US5700626A

## CPC

- G03F 7/094: {Multilayer resist systems, e.g. planarising layers}
- G03F 7/0035: {Multiple processes, e.g. applying a further resist layer on an already in a previously step, processed pattern or textured surface}
- Y10S 430/143: Electron beam
- Y10S 438/949: Energy beam treating radiation resist on semiconductor
- Y10S 438/95: Multilayer mask including nonradiation sensitive layer
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS

## Abstract

A method for forming a multi-layer resist (MLR) pattern capable of preventing a generation of a charge-up effect in an exposure to electron beams and reducing alignment detect errors, and employing a silylation process, thereby achieving an improvement in resonance. The method includes the steps of forming a primary alignment mark on a silicon substrate formed with a cell part including a plurality of cell patterns having steps, depositing a lower deposition film over the silicon substrate, coating a lower resist film over the lower deposition film, subjecting a portion of the lower resist film to a light exposure and a development to form a secondary alignment mark, forming an intermediate insulating layer over the lower resist film, coating an upper resist film over the intermediate insulating layer to form a MLR film, subjecting the upper resist film to a light exposure to fork a latent image pattern at a non-exposed portion of the upper resist film, subjecting the resulting structure to a silylation to form a silylated layer over the upper resist film, etching the upper resist film to form an upper resist pattern and removing the silylated layer, patterning the intermediate insulating layer by use of the upper resist pattern as a mask, and etching the lower resist film by use of the intermediate insulating layer as a mask, thereby forming a MLR pattern.

## Claims

### Claim 1

A method for forming a multi-layer resist pattern, comprising the steps of:
forming at least one primary alignment mark on a silicon substrate adjacent a cell part including a plurality of cell patterns having steps;
depositing a lower film over said silicon substrate;
coating a lower resist film over said lower film;
subjecting said lower resist film to a light exposure and development step, thereby forming at least one secondary alignment mark;
forming an intermediate insulating layer over said lower resist film;
implanting positive ions in said intermediate insulating layer such that the surface of the intermediate insulating layer is charged with said positive ions, so as to prevent an occurrence of a charge-up effect in exposure to electron beams;
coating an upper resist film over said intermediate insulating layer, thereby forming a multi-layer resist film;
subjecting said upper resist film to a light exposure step, thereby forming a latent image pattern at an exposed portion of said upper resist film;
subjecting the resulting structure to a silylation step, thereby forming a silylation layer at said upper resist film;
etching said upper resist film to form an upper resist pattern and removing said silylation layer;
patterning the intermediate insulating layer by using said upper resist pattern as a mask to form a patterned intermediate insulating layer; and
etching said lower resist film by using said patterned intermediate insulating layer as a mask,
wherein said etching of each said upper and lower resist films is carried out by a direct writing of electron beams.

### Claim 2 (depends on 1)

A method in accordance with claim 1, wherein said positive ions are O.sub.2.sup.+ ions.

### Claim 3 (depends on 2)

A method in accordance with claim 2, wherein said implantation of said O.sub.2.sup.+ ions is carried out under a condition using a pressure of 300 to 700 mT, a high frequency power of 100 to 700 W and a temperature of 25.degree. C.

### Claim 4 (depends on 1)

A method in accordance with claim 1, wherein said positive ions are H.sup.+ ions.

### Claim 5 (depends on 4)

A method in accordance with claim 4, wherein said implantation of said H.sup.+ ions is carried out under a condition using an accelerated voltage of 10 to 70 kV and a dose amount of 1.times.10.sup.14 to 1.times.10.sup.18 ions/cm.sup.2.

### Claim 6

A method for forming a multi-layer resist pattern, comprising the steps of:
forming at least one primary alignment mark on a silicon substrate adjacent a cell part including a plurality of cell patterns having steps;
depositing a lower film over said silicon substrate;
coating a lower resist film over said lower film;
subjecting said lower resist film to a light exposure and development step, thereby forming at least one secondary alignment mark;
implanting positive ions in said lower resist film such that the surface of the lower resist film is charged with said positive ions;
forming an intermediate insulating layer over said lower resist film;
coating an upper resist film over said intermediate insulating layer, thereby forming a multi-layer resist film;
subjecting said upper resist film to a light exposure, thereby forming a latent image pattern at an exposed portion of said upper resist film;
subjecting the resulting structure to a silylation step, thereby forming a silylation layer at said upper resist film;
etching said upper resist film to form an upper resist pattern and removing said silylation layer;
patterning the intermediate insulating layer by using said upper resist pattern as a mask to form a patterned intermediate insulating layer; and
etching said lower resist film by using said patterned intermediate insulating layer as a mask,
wherein said etching of each said upper and lower resist films is carried out by a direct writing of electron beams.

### Claim 7

A method for forming a multi-layer resist pattern, comprising the steps of:
forming at least one primary alignment mark on a silicon substrate adjacent a cell part including a plurality of cell patterns having steps;
depositing a lower film over said silicon substrate;
coating a lower resist film over said lower film;
subjecting said lower resist film to a light exposure and development step, thereby forming at least one secondary alignment mark;
forming an intermediate insulating layer over said lower resist film;
coating an upper resist film over said intermediate insulating layer, thereby forming a multi-layer resist film;
implanting positive ions in said upper resist film such that the surface of the upper resist film is charged with said positive ions;
subjecting said upper resist film to a light exposure, thereby forming a latent image pattern at an exposed portion of said upper resist film;
subjecting the resulting structure to a silylation step, thereby forming a silylation layer at said upper resist film;
etching said upper resist film to form an upper resist pattern and removing said silylation layer;
patterning the intermediate insulating layer by using said upper resist pattern as a mask to form a patterned intermediate insulating layer; and
etching said lower resist film by using said patterned intermediate insulating layer as a mask,
wherein said etching of each said upper and lower resist films is carried out by a direct writing of electron beams.

### Claim 8

A method for forming a multi-layer resist pattern, comprising the steps of:
forming at least one primary alignment mark on a silicon substrate adjacent a cell part including a plurality of cell patterns having steps;
depositing a lower film over said silicon substrate;
coating a lower resist film over said lower film;
subjecting said lower resist film to a light exposure and development step, thereby forming at least one secondary alignment mark;
implanting positive ions in said lower resist film such that the surface of the lower resist film is charged with said positive ions;
forming an intermediate insulating layer over said lower resist film;
implanting positive ions in said intermediate insulating layer such that the surface of the intermediate insulating layer is charged with said positive ions;
coating an upper resist film over said intermediate insulating layer, thereby forming a multi-layer resist film;
subjecting said upper resist film to a light exposure, thereby forming a latent image pattern at an exposed portion of said upper resist film;
subjecting the resulting structure to a silylation step, thereby forming a silylation layer at said upper resist film;
etching said upper resist film to form an upper resist pattern and removing said silylation layer;
patterning the intermediate insulating layer by using said upper resist pattern as a mask to form a patterned intermediate insulating layer; and
etching said lower resist film by using said patterned intermediate insulating layer as a mask,
wherein said etching of each said upper and lower resist films is carried out by a direct writing of electron beams.

### Claim 9

A method for forming a multi-layer resist pattern, comprising the steps of:
forming at least one primary alignment mark on a silicon substrate adjacent a cell part including a plurality of cell patterns having steps;
depositing a lower film over said silicon substrate;
coating a lower resist film over said lower film;
subjecting said lower resist film to a light exposure and development step, thereby forming at least one secondary alignment mark;
forming an intermediate insulating layer over said lower resist film;
implanting positive ions in said intermediate insulating layer such that the surface of the intermediate insulating layer is charged with said positive ions;
coating an upper resist film over said intermediate insulating layer, thereby forming a multi-layer resist film;
implanting positive ions in said upper resist film such that the surface of the upper resist film is charged with said positive ions;
subjecting said upper resist film to a light exposure, thereby forming a latent image pattern at an exposed portion of said upper resist film;
subjecting the resulting structure to a silylation step, thereby forming a silylation layer at said upper resist film;
etching said upper resist film to form an upper resist pattern and removing said silylation layer;
patterning the intermediate insulating layer by using said upper resist pattern as a mask to form a patterned intermediate insulating layer; and
etching said lower resist film by using said patterned intermediate insulating layer as a mask,
wherein said etching of each said upper and lower resist films is carried out by a direct writing of electron beams.