# US 5,699,610 A · Process for connecting electronic devices

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- Number: US 5,699,610 A
- Document ID: US5699610A
- Status: Granted
- Kind: A
- Application number: 08/474,019
- Filed: 1995-06-07
- Granted: 1997-12-23
- Earliest claimed: 1994-04-22
- Assignees: NEC Corporation
- Inventors: Yuzo Shimada; Takayuki Suyama; Yoshimasa Tanaka; Shinichi Hasegawa
- Web page: https://patentgrep.com/patent/US5699610A

## CPC

- H10W 70/095: {of vias therein}
- H05K 3/301: {by means of a mounting structure (H05K3/325 takes precedence)}
- H05K 3/363: {by soldering}
- H10W 40/611: {Bolts or screws}
- H10W 70/453: {comprising flexible metallic tapes}
- H10W 70/688: {Flexible insulating substrates}
- H10W 72/00: Interconnections or connectors in packages
- H05K 1/0201: {Thermal arrangements, e.g. for cooling, heating or preventing overheating}
- H05K 3/3465: Application of solder
- H05K 2201/062: Means for thermal insulation, e.g. for protection of parts
- H05K 2201/09827: Tapered, e.g. tapered hole, via or groove
- H05K 2201/09854: Hole or via having special cross-section, e.g. elliptical
- H05K 2201/10568: Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
- H05K 2201/10666: Plated through-hole for surface mounting on PCB
- H05K 2201/10681: Tape Carrier Package [TCP]; Flexible sheet connector
- H10W 40/231: {characterised by their places of attachment or cooling paths}
- H10W 40/233: {attached to chips}
- H10W 40/237: {attached to additional arrangements for cooling}
- H10W 40/60: Securing means for detachable heating or cooling arrangements, e.g. clamps
- H10W 70/682: {comprising holes having chips therein}
- H10W 70/685: comprising multiple insulating layers
- Y10T 29/49144: by metal fusion
- Y10T 29/49165: by forming conductive walled aperture in base
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

In a first step, a first substrate is prepared. The first substrate has a first surface, a second surface, and a through-hole therebetween. In a second step, a second substrate is prepared. The second substrate has a first surface, a second surface, and a pad on the first surface of the second substrate. In a third step, a solder is provided on the pad of the second substrate. In a fourth step, the through-hole of the first substrate is positioned on the solder. The second surface of the first substrate and the first surface of the second substrate face each other. In a fifth step, the solder is heated to flow the solder into the through-hole of the first substrate. In the sixth step, an appearance of the solder on the first surface of the first substrate may be confirmed for detection of a connection of the solder.

## Claims

### Claim 1

A process for connecting electronic devices, comprising steps of:
(a) preparing a first substrate having a first surface, a second surface, and a through-hole therebetween;
(b) preparing a second substrate having a first surface, a second surface, and a pad on said first surface of said second substrate;
(c) providing a solder on said pad of said second substrate;
(d) positioning said through-hole of said first substrate on said solder, said second surface of said first substrate and said first surface of said second substrate opposing one another;
(e) heating said solder to flow said solder into said through-hole of said first substrate and to protrude said solder from said through-hole of said first substrate, to couple said first substrate to said second substrate; and
(f) confirming one of an appearance of said solder on said first surface of said first substrate and whether at least a portion of said solder is protruding from said through-hole of said first substrate, thereby to judge a connection condition of said second surface of said first substrate to said first surface of said second substrate.

### Claim 2 (depends on 1)

A process according to claim 1, wherein said step (a) comprises a step of:
(a-1) tapering said through-hole.

### Claim 3 (depends on 1)

A process according to claim 1, wherein said step (a) comprises a step of:
(a-2) forming a first conductive pattern on a surface of said through-hole.

### Claim 4 (depends on 1)

A process according to claim 1, wherein said step (a) comprises a step of:
(a-3) forming a second conductor pattern surrounding said through-hole on said second surface of said first substrate, said second conductor pattern being adjacent to said through-hole.

### Claim 5 (depends on 4)

A process according to claim 4, wherein said step (a) comprises a step of:
(a-4) providing a first solder resist surrounding said second conductor pattern on said second surface of said first substrate.

### Claim 6 (depends on 1)

A process according to claim 1, wherein said step (a) comprises a step of:
(a-5) forming a third conductor pattern surrounding said through-hole on said first surface of said first substrate, said second conductor pattern being adjacent to said through-hole.

### Claim 7 (depends on 4)

A process according to claim 4, wherein said step (a) comprises a step of:
(a-6) providing a second solder resist surrounding said third conductor pattern on said first surface of said first substrate.

### Claim 8 (depends on 1)

A process according to claim 1, wherein said step (b) comprises a step of:
(b-1) providing a third solder resist surrounding said pad on said first surface of said second substrate.

### Claim 9 (depends on 1)

A process according to claim 1, wherein said first substrate comprises a film.

### Claim 10 (depends on 1)

A process according to claim 1, wherein a diameter of said through-hole is from 100 .mu.m to 220 .mu.m on said first surface of said first substrate.

### Claim 11 (depends on 1)

A process according to claim 1, wherein a diameter of said through-hole is from 250 .mu.m to 320 .mu.m on said second surface of said first substrate.

### Claim 12 (depends on 4)

A process according to claim 4, wherein a diameter of said second conductor pattern is from 500 .mu.m to 620 .mu.m.

### Claim 13 (depends on 6)

A process according to claim 6, wherein a diameter of said third conductor pattern is from 150 .mu.m to 270 .mu.m.

### Claim 14 (depends on 1)

A process according to claim 1, wherein said step (e) comprises a step of:
(e-1) pressing said first substrate against said second substrate.