Memory paging system and method including compressed page mapping hierarchy
AssigneeAdvanced Micro Devices, Inc.
InventorsJames R. MacDonald, Drew Dutton, Steve Cox
Life of this patent
Estimating the term…
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AssigneeAdvanced Micro Devices, Inc.
InventorsJames R. MacDonald, Drew Dutton, Steve Cox
Estimating the term…
A memory paging and compression system for a computer having a memory and an execution unit includes an address mapping hierarchy, a compressed page mapping hierarchy, a translation lookaside buffer, and a compression/decompression component. The address mapping hierarchy includes page tables having page table entries which map from a first portion of virtual addresses to respective pages in physical memory. The compressed page mapping hierarchy includes compressed page tables having compressed page table entries mapping from the first portion of virtual addresses to respective compressed pages in physical memory. The translation lookaside buffer caches recently used ones of the mappings from the first portion of virtual addresses to respective pages in physical memory. The compression/decompression component includes a compression/decompression engine coupled between a memory and an execution unit for alternately compressing and decompression pages in memory in respective correspondence with spills from and loads to the translation lookaside buffer. The address mapping hierarchy and compressed page mapping hierarchy may be represented in memory and the compression/decompression component may further include a decompression fault handler and a compression fault handler, each executable on the execution unit.
A memory paging system for a computer having a memory and an execution unit addressing the memory using virtual addresses, the memory paging system comprising:
In a memory paging system for a computer having an execution unit, a memory including a hierarchy of data stores for encoding a mapping from virtual memory addresses to physical memory addresses, and a translation lookaside buffer for caching recently-used virtual to physical address mappings, a compression/decompression subsystem comprising:
In a memory paging and compression system, a method for handling a decompression fault arising from a faulting memory access, the method comprising the steps of:
In a memory paging and compression system, a method for handling a compression fault, the method comprising the steps of:
Dependencies are inferred from the claim text.