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US 5,694,611 AGranted
Microcomputer including internal and direct external control of EEPROM and method of making the microcomputer
AssigneesMitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Semiconductor Software Co., Ltd.
InventorToshiyuki Matsubara
Life of this patent
Estimating the term…
Abstract
A microcomputer including an EEPROM in which data may be stored and from which stored data may be read either under control of a central processing unit of the microcomputer or under direct external control. The microcomputer includes separate inputs for data input and data output signals when storing and reading is under the control of the central processing unit and when storing and reading of data is under direct external control. The central processing unit may inhibit direct external control of storing data in and reading data from the EEPROM.
Claims9
A microcomputer comprising:
- a central processing unit;
- an EEPROM including a non-volatile memory in which data can be electrically stored and from which stored data can be read;
- first input/output means coupled to said central processing unit for inputting a signal into said microcomputer and outputting a signal from said microcomputer under control of said central processing unit;
- second input/output means electrically connected to said EEPROM for storing data in said EEPROM and for reading stored data from said EEPROM in response to an external signal applied directly from an external device to said microcomputer;
- signal switching control means electrically connected between said EEPROM and said first and second input/output means for selectively connecting said EEPROM to said first input/output means and to said second input/output means;
- and
- external input/output control means electrically connecting said second input/output means to said EEPROM for selectively inhibiting direct external input to and output from said EEPROM through said second input/output means under control of said central processing unit, said external input/output control means including a control register coupled to said central processing unit for controlling operation of said EEPROM under control of said central processing unit, and a control switch including a plurality of logic gates connected between said second input/output means and said signal switching control means and to said control register, said control register selectively generating an inhibition signal for inhibiting said logic gates when said EEPROM is under control of said central processing unit and not generating the inhibition signal when said EEPROM is under direct external control.
4 more elements
A microcomputer comprising:
- a central processing unit;
- an EEPROM including a non-volatile memory in which data can be electrically stored and from which stored data can be read;
- first input/output means coupled to said central processing unit for inputting a signal into said microcomputer and outputting a signal from said microcomputer under control of said central processing unit;
- second input/output means electrically connected to said EEPROM for storing data in said EEPROM and for reading stored data from said EEPROM in response to an external signal applied directly from an external device to said microcomputer;
- signal switching control means having a plurality of logic gates and electrically connected between said EEPROM and said first and second input/output means for selectively connecting said EEPROM to said first input/output means and to said second input/output means;
- and
- an operation register electrically connected to said central processing unit and to said second input/output means so that an operational mode of said EEPROM may be set through each of said central processing unit and said second input/output means.
4 more elements
A method of manufacturing a microcomputer comprising:
- producing a microcomputer having a central processing unit, an EEPROM including a non-volatile memory in which data may be electrically stored and from which stored data can be read, first input/output means electrically connected to said central processing unit for inputting a signal into said microcomputer and outputting a signal from said microcomputer under control of said central processing unit, second input/output means electrically connected to the EEPROM for storing data in said EEPROM and for reading stored data from the EEPROM in response to an external signal directly applied to said microprocessor, and external input/output control means electrically connecting said second input/output means to said EEPROM for selectively inhibiting direct external input to and output from said EEPROM through said second input/output means under control of said central processing unit;
- and, said external input/output control means including an operation register electrically connected to said central processing unit for controlling operating of said EEPROM under control of said central processing unit, and a plurality of logic gates connected to said operation register, said operation register selectively generating an inhibition signal for inhibiting said logic gates when said EEPROM is under control of said central processing unit and not generating the inhibition signal when said EEPROM is under direct external control;
- testing storing of data in and reading stored data from said EEPROM through said first input/output means under control of said central processing unit;
- testing storing of data in and reading of stored data from said EEPROM under direct external control through said second input/output means;
- and
- storing initial data in said EEPROM.
3 more elements
Dependencies are inferred from the claim text.