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AssigneeMicron Quantum Devices, Inc.
InventorsChristophe J. Chevallier, Michael S. Briner
Estimating the term…
An operational amplifier-based voltage multiplier circuit ("op amp circuit") implemented as an integrated circuit, and a memory chip including such an op amp circuit. The op amp circuit includes a variable operational feedback or input resistance (or a variable operational feedback resistance and a variable input resistance), and preferably also circuitry for controlling at least one variable resistance in response to control bits to cause the op amp circuit to assert a selected output voltage in response to a given input voltage. Preferably, each set of control bits determines a binary control word whose binary value has a simple functional relation to the value of the output voltage selected thereby. Preferably, the memory chip includes an array of memory cells (e.g, flash memory cells) and a control unit for controlling memory operations including programming, reading, and erasing the memory cells. The op amp circuit outputs each selected output voltage in response to a different binary control word asserted by the control unit. Each binary control word is preferably determined by a set of control bits whose binary value has a simple functional relation to the value of the output voltage selected thereby. The memory chip preferably includes non-volatile data storage units which store bits of the binary control words.
An operational amplifier-based voltage multiplier circuit implemented as an integrated circuit, including:
An operational amplifier-based voltage multiplier circuit implemented as an integrated circuit, including:
An operational amplifier-based voltage multiplier circuit implemented as an integrated circuit, including:
An operational amplifier-based voltage multiplier circuit implemented as an integrated circuit, including:
An operational amplifier-based voltage multiplier circuit implemented as an integrated circuit, including:
An operational amplifier-based voltage multiplier circuit implemented as an integrated circuit, including:
An operational amplifier-based voltage multiplier circuit implemented as an integrated circuit, including:
An operational amplifier-based voltage multiplier circuit implemented as an integrated circuit, including:
An operational amplifier-based voltage multiplier circuit implemented as an integrated circuit, including:
A memory system implemented as an integrated circuit, including:
A method for controlling a voltage multiplier circuit implemented as an integrated circuit, said voltage multiplier circuit including an op amp having a first input for receiving an input voltage, a second input for receiving a second voltage, and an output which asserts an output voltage in response to the input voltage and the second voltage, said voltage multiplier circuit also including a feedback circuit, having a feedback resistance, connected between the output and the second input, and said voltage multiplier circuit also including an input circuit, having an input resistance, connected between ground and the second input, said method including the step of:
A method for operating a memory system implemented as an integrated circuit, said memory system including an array of memory cells, and a voltage multiplier circuit including an op amp having a first input for receiving an input voltage, a second input for receiving a second voltage, and an output for asserting an output voltage for use in at least one memory operation of the system, said voltage multiplier circuit also including a feedback circuit, having a feedback resistance, connected between the output and the second input, and said voltage multiplier circuit also including an input circuit, having an input resistance, connected between ground and the second input, said method including the steps of:
Dependencies are inferred from the claim text.