Method for electrically modeling a semiconductor package
AssigneeMotorola, Inc.
InventorsWai-Yeung Yip, Arijit Chandra
Life of this patent
Estimating the term…
Loading patent…
AssigneeMotorola, Inc.
InventorsWai-Yeung Yip, Arijit Chandra
Estimating the term…
A method of electrically modeling a semiconductor package is provided. The method reduces computation time for mutual inductance calculations between interconnect lines of the semiconductor package. Only interconnect within a predetermined distance of an interconnect line being modeled is calculated for mutual inductance. The predetermined distance is selected such that any interconnect line greater than the predetermined distance away from the interconnect line being modeled produces a negligible or small mutual inductance. This greatly reduces the number of calculations for semiconductor packages having a large number of interconnect lines. Each interconnect line modeled is broken into segments for calculating mutual inductance. An algorithm is used that calculates the mutual inductance between a pair of arbitrarily oriented straight line metal segments. The algorithm requires a single integration which significantly reduces computation time when compared with systems solving Maxwell's equation in three dimensions.
A method for generating an electrical model of semiconductor package comprising the steps of:
A method for electrically modeling a semiconductor package comprising the steps of:
Dependencies are inferred from the claim text.