Etch stop for copper damascene process
AssigneeChartered Semiconductor Manufacturing Pte Ltd.
InventorSu-Ping Teong
Life of this patent
Estimating the term…
Loading patent…
AssigneeChartered Semiconductor Manufacturing Pte Ltd.
InventorSu-Ping Teong
Estimating the term…
The invention describes the application of copper damascene connectors to a double level metal process. A dual damascene copper connector whose upper surface is coplanar with the upper surface of the insulating layer in which it is embedded is described. Out-diffusion of copper from the connector is prevented by at least two barrier layers. One or two barrier layers are located at the interface between the connector and the insulating layer while another barrier layer comprises conductive material and covers the upper surface of the connector. When a second damascene connector is formed above the first connector the conductive barrier layer facilitates good contact between the two connectors. It also acts as an etch stop layer during the formation of the second connector. A process for manufacturing this structure is also described. It involves over-filling a trench in the surface of the insulator with copper and then removing the excess by chem.-mech. polishing.
A method for manufacturing a double layered copper connector comprising:
Dependencies are inferred from the claim text.