Method and apparatus for operating a microcomputer in an emulation mode to access an external peripheral

A method for enabling a first microcomputer to emulate the performance of a second microcomputer, the second microcomputer capable of performing a specified circuit function that includes the manipulation of data in a required manner, the first microcomputer including at least one internal peripheral, the first microcomputer being unable to manipulate data in the manner required by the specified circuit function, the first microcomputer further including a processor, connected to the internal peripheral through an internal address bus and an internal data bus to communicate with the internal peripheral, an internal address decoder coupled to the internal address bus, and at least one input/output port, the method including the steps of:

• providing an external peripheral capable of manipulating data in the manner required by the specified circuit function;
• providing an external address decoder to decode address signals;
• coupling the external peripheral and the external address decoder through the at least one input/output port to the internal address and internal data buses to create a system address bus and a system data bus;
• and
• operating the first microcomputer such that the processor communicates with the external peripheral over the system address bus and the system data bus to perform the specified circuit function, the step of operating including steps of:
• placing a plurality of address signals on the system address bus from the processor via the internal address bus:
• decoding the address signals in the external address decoder;
• pre-loading the internal address decoder with addresses on the internal address bus;
• and
• sending a blocking signal from the external address decoder to the internal address decoder when an external address is detected on the system address bus by the external address decoder to block the pre-loading of the internal address decoder.

A method for operating a microcomputer system, the system including a microcomputer having at least one internal peripheral and a processor, the microcomputer further including internal address and data buses coupling the processor to the at least one internal peripheral and an internal address decoder coupled to the internal address bus, the microcomputer having at least one input/output port, the system further including at least one external peripheral and an external address decoder that are external to the microcomputer, the method including the steps of:

• A. coupling the at least one input/output port to the internal address and data buses;
• B. coupling the external peripheral and the external address decoder, through the at least one input/output port, to the internal address and data buses to create system address and data buses;
• and
• C. operating the microcomputer to pass, via the processor the internal buses and the system buses, addresses and data between the processor the at least one internal peripheral and the at least one external peripheral, the at least one external peripheral being accessed by the processor over the system address and data buses, the step of operating including steps of:
• placing a plurality of address signals on the system address bus from the processor and decoding the address signals in the external address decoder;
• pre-loading the internal address decoder with addresses on the internal address bus;
• and
• sending a blocking signal from the external address decoder to the internal address decoder when an external address is detected on the system address bus by the external address decoder to block the pre-loading of the internal address decoder.

A microcomputer system, comprising:

• a microcomputer including;
• at least one internal peripheral;
• a processor;
• an internal address bus coupling the processor to the at least one internal peripheral;
• an internal data bus coupling the processor to the at least one internal peripheral;
• an internal address decoder, coupled to the internal address bus, that is pre-loaded with addresses on the intemal address bus;
• and
• at least one input/output port coupled to the internal address and data buses;
• an external address bus;
• an external data bus;
• at least one external peripheral that is external to the microcomputer, the at least one external peripheral being coupled, through the external address and data buses and the at least one input/output port, to the internal address and data buses so that the external peripheral can be accessed by the processor;
• and
• an external address decoder external to the microcomputer and coupled to the external address and data buses, wherein the external address decoder decodes addresses placed on the external address bus, the external address decoder being adapted to send a blocking signal to block the preloading of the internal address decoder when an external address is detected on the external address bus by the external address decoder.

A microcomputer system, comprising:

• a microcomputer including;
• at least one intemal peripheral;
• a processor;
• an internal address bus coupling the processor to the at least one internal peripheral;
• an internal data bus coupling the processor to the at least one internal peripheral;
• an internal address decoder, coupled to the internal address bus, that is pre-loaded with addresses on the internal address bus:
• and
• at least one input/output port coupled to the internal address and data buses;
• an external address bus;
• an external data bus;
• first and second external peripherals that are external to the microcomputer and perform functions, the function performed by the first external peripheral being different from that performed by the second peripheral, the first and second external peripherals being coupled to the processor through the external address and data buses and the at least one input/output port so that the first and second external peripherals can be accessed by the processor;
• and
• an external address decoder external to the microcomputer and coupled to the external address and data buses, wherein the external address decoder decodes addresses placed on the external address bus, the external address decoder being adapted to send a blocking signal to block the preloading of the intemal address decoder when an external address is detected by the external address decoder.

A method for operating a first microcomputer in an emulation mode wherein the first microcomputer emulates the performance of a second microcomputer having an internal peripheral that performs a specified function, the first microcomputer having a processor, at least one internal peripheral, an internal address bus, an internal address decoder, and an internal data bus, the internal address and data buses coupling the processor to the at least one internal peripheral, the first microcomputer further having at least one input/output port coupled to the internal address and data buses, the method including the steps of:

• A. providing at least one external peripheral that performs the specified function;
• B. providing an external address decoder;
• C. coupling the external peripheral and the external address decoder, via the at least one input/output port, to the internal address and data buses;
• and
• D. operating the first microcomputer so that the processor accesses the at least one external peripheral via the input/output port to perform the specified function, whereby the first microcomputer emulates the performance of the second microcomputer, the step of operating including steps of:
• placing a plurality of address signals on the internal address bus from the processor and decoding the address signals in the external address decoder;
• pre-loading the internal address decoder with addresses on the internal address bus;
• and
• sending a blocking signal from the external address decoder to the internal address decoder when an external address is detected by the external address decoder to block the pre-loading of the internal address decoder.