Block replacement method in cache only memory architecture multiprocessor
AssigneesSamsung Electronics Co., Ltd., University of Minnesota
InventorGyungho Lee
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AssigneesSamsung Electronics Co., Ltd., University of Minnesota
InventorGyungho Lee
Estimating the term…
A block replacement method for use in a bus-based cache only memory architecture multiprocessor, is invoked when a block in a local memory of a first processing node in the multiprocessor is to be replaced to make a space for an incoming block supplied via a system bus from a local memory of a second processing node in the multiprocessor, and includes the following steps: (a) if the block of the first processing node is in an invalid state, or in a shared state, overwriting the block of the first processing node with the incoming block from the second processing node; (b) if the block of the first processing node is in an exclusive state, or in a shared owner state, relocating the block of the first processing node to a third processing node in the multiprocessor, selected in accordance with a predetermined priority scheme, and then overwriting the block of the first processing node with the incoming block from the second processing node; and (c) if the third single processing node cannot be determined among the processing nodes in the multiprocessor with the predetermined priority scheme in step (b), swapping the block of the first processing node for the incoming block from the second processing node.
An improved block replacement method for use in a bus-based multiprocessor employing cache only memory architecture, the multiprocessor including a multiplicity of processing nodes connected via a system bus, each processing node having a cache memory contained in a processing block and a local memory for storing data decomposed into a plurality of blocks, the local memory acting as a cache with no backing main memory provided in the multiprocessor, the method being invoked when a block in the local memory of a first processing node in the multiprocessor is to be replaced to make a space for an incoming block supplied via the system bus from the local memory of a second processing node in the multiprocessor, the method comprising the steps of:
A local memory coherence method for use in a multiprocessor, the multiprocessor including a multiplicity of processing nodes connected via a system bus, each processing node having a local memory for storing data decomposed into a plurality of blocks, the local memory acting as a cache with no backing main memory provided in the multiprocessor, the method comprising the steps of:
A multiprocessor comprising:
Dependencies are inferred from the claim text.