US 5,691,985 AGranted

System and method for increasing throughput of inter-network gateways using a hardware assist engine

AssigneeLucent Technologies Inc.

InventorsDiana Lynne Lorenz, Robert Francis Shaw, Ronald Anthony Spanke

Life of this patent

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Abstract

A high bandwidth gateway comprises a source of packet traffic wherein received packets are stored in a buffer, a destination interface circuit for the packets, a microprocessor and a bus that interconnects the components. The microprocessor, which in the prior art controls data transfers, periodically gives up control to a hardware assist engine. The hardware assist engine detects the presence of packets in the source buffer and causes the source buffer to output one or more packets to the destination directly, thus by-passing the microprocessor completely. By this system, bandwidth is improved by the source and the destination working together directly, without having the overhead associated with microprocessor-based or initiated data transfers.

Claims24

Dependent claims

A gateway apparatus for connecting packet networks, said packet networks communicating with each other via packets transmitted through said gateway, said gateway comprising:

a receive buffer for receiving packets from one of said packet networks;
a transmit interface for transmitting said packets to another of said packet networks;
a microprocessor connected to said receive buffer and to said transmit interface, said microprocessor including means for transferring packets from said receive buffer to said transmit interface, and from a receive interface to a transmit buffer;
and
a hardware assist means connected to said transmit interface and said receive buffer;
said microprocessor includes means for giving up control of said gateway to said hardware assist means, and said hardware assist means including means for detecting packets at said receive buffer, and means for transferring said detected packet to said transmit interface without transferring said packet data through said microprocessor.

3 more elements

A method for use in a gateway connecting packet networks, said packet networks communicating with each other via packets transmitted through said gateway, said gateway comprising a receive buffer for receiving packets from one of said packet networks, a transmit interface for transmitting said packets to another of said packet networks, a microprocessor for controlling said gateway, and a hardware assist engine, said method comprising the steps of:

said microprocessor turning control of said gateway over to said hardware assist engine;
said hardware assist engine detecting the presence of a packet at said receive buffer;
and
said hardware assist engine transferring said packet from said receive buffer to said transmit interface without the packet data passing through said microprocessor.

1 more element

Dependencies are inferred from the claim text.

Facts

Application: 08/426,425Filed 19 Apr 1995
Granted: 25 Nov 1997
Term ends: Not estimatedThe source records don’t support an estimate.

Classification10 codes

H04Q 11/0478
Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral,…:…
H04L 9/40
Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols: network security protocols
H04L 69/12
Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass:…
H04L 2012/5607
Medium of transmission, e.g. fibre, cable, radio: radio