Memory with fast decoding

An electronic memory comprising:

• a memory array for electronically storing information;
• and
• address means for sequentially addressing information storage locations in the memory array by decoding a multiplicity of sequentially supplied input memory addresses to generate a like multiplicity of respectively corresponding decoded memory addresses, each identifying one of the storage locations, the address means comprising a plurality of decoding segments arranged in parallel, each decoding segment sequentially decoding different ones of the input memory addresses from each other decoding segment, each decoding segment being operable to decode one of the input memory addresses while at least one other decoding segment is simultaneously decoding one of the other input memory addresses.

An electronic memory comprising:

• a plurality of memory arrays for electronically storing information, each memory array storing information identical to that stored in each other memory array;
• and
• address means for sequentially addressing information storage locations in the memory arrays by decoding a multiplicity of sequentially supplied input memory addresses to generate a like multiplicity of respectively corresponding decoded memory addresses, each identifying one storage location in each of the memory arrays, the address means comprising a like plurality of decoding segments arranged in parallel, each decoding segment sequentially decoding a different one of the input memory addresses from each other decoding segment to generate the decoded memory addresses for different corresponding ones of the memory arrays, each decoding segment being operable to decode one of the input memory addresses while at least one other decoding segment is simultaneously decoding one of the other input memory addresses.