Semiconductor memory device in which data are read and written asynchronously with application of address signal
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTsukasa Ooishi
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Abstract
A semiconductor memory device includes an address register circuit for storing a plurality of address signals when an address latch enable signal is active in synchronization with a basic timing signal. When an internal operation start instructing signal is activated, a selected address signal from the address register circuit is supplied to a row decoder and a column decoder for memory cell selection. While an internal memory selection operation is performed, an address signal is stored in the address register circuit. Application of an address signal and a memory accessing is carried out asynchronously.
Claims27
A semiconductor memory device comprising:
- a memory array including a plurality of memory cells;
- address storage means for sequentially incorporating address signals each designating at least a part of an address of said memory array to store a plurality of received address signals and for generating an address signal to be decoded from said plurality of received address signals through a predetermined operational processing;
- and
- decoding means for receiving and decoding the address signal to be decoded from said address storage means to select an addressed memory cell of said memory cell array.
Dependencies are inferred from the claim text.