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US 5,691,722 AGranted
Direct-digitizing, self stabilizing analog to digital converter
OwnerWenwei Wanginventor
Life of this patent
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Abstract
An n-bit analog to digital, (A/D), converter utilizes n comparators, and n internal digital to analog, (D/A) converters. The n D/A converters have the same full-scale output, and the same absolute accuracy in terms of voltage or current, but have n different resolutions ranging consecutively from a 1-bit D/A converter to an n-bit D/A converter. The n-bit A/D converter is divisible into n stages, ranging consecutively from a first stage containing the 1-bit D/A converter and a first comparator, to an n-th stage containing the n-bit D/A converter and an n-th comparator. The least significant bit input terminal of each D/A converter is connected to a logic high level. In each stage, an analog input signal is compared with a reference provided by a D/A converter.
Claims21
An n-bit analog to digital converter, wherein n is an integer greater than 1, comprising:
- n comparator means, designated consecutively from a first comparator means to an n-th comparator means;
- a terminal for receiving an analog input signal, said terminal being connected to each of said comparator means;
- n internal voltage output digital to analog converter means with essentially the same full-scale output voltage corresponding to a full-scale range of said analog to digital converter, and with essentially the same absolute accuracy in terms of voltage, but with n essentially different resolutions, ranging consecutively from a 1-bit digital to analog converter means to an n-bit digital to analog converter means;
- wherein said n-bit analog to digital converter is divisible into n stages, ranging consecutively from a first stage comprising said first comparator means and said 1-bit digital to analog converter means, to an n-th stage comprising said n-th comparator means and said n-bit digital to analog converter means;
- and wherein
- in each of said stages, a voltage output of one of said digital to analog converter means is provided as a reference voltage to one of said comparator means;
- wherein the least-significant-bit input terminal of each of said digital to analog converter means is functionally equivalent to being connected to a constant logic high level;
- wherein an output terminal of said first comparator means is essentially connected to every most-significant-bit input terminal of said digital to analog converter means in immediately subsequent stages, an output terminal of a second comparator means is essentially connected to every next-most-significant-bit input terminal of said digital to analog converter means in immediately subsequent stages, and so forth, with an exception that an output terminal of said n-th comparator means being not connected to any of said digital to analog converter means;
- and
- wherein a binary output of said first comparator means provides the most significant bit signal of an analog to digital conversion output, a binary output of said second comparator means provides the next most significant bit signal of said analog to digital conversion output, and so forth, a binary output of said n-th comparator means provides the least significant bit signal of said analog to digital conversion output.
7 more elements
An n-bit analog to digital converter, wherein n is an integer greater than 1, comprising:
- n comparator means, designated consecutively from a first comparator means to an n-th comparator means;
- a terminal for receiving an analog input signal, said terminal being connected to each of said comparator means;
- n internal current output digital to analog converter means with essentially the same full-scale current output corresponding to a full-scale range of said n-bit analog to digital converter, and with essentially the same absolute accuracy in terms of current, but with n essentially different resolutions, ranging consecutively from a 1-bit digital to analog converter means to an n-bit digital to analog converter means;
- wherein said n-bit analog to digital converter is divisible into n stages, ranging consecutively from a first stage comprising said first comparator means and said 1-bit digital to analog converter means, to an n-th stage comprising said n-th comparator means and said n-bit digital to analog converter means;
- and wherein
- in each of stages, a current output of one of said digital to analog converter means is provided as an equivalent reference to one of said comparator means;
- and
- wherein the least-significant-bit input terminal of each of said digital to analog converter means is functionally equivalent to being connected to a logic high level;
- and
- wherein an output terminal of said first comparator means is essentially connected to every most-significant-bit input terminal of said digital to analog converter means in immediately subsequent stages, an output terminal of a second comparator means is essentially connected to every next-most-significant-bit input terminal of said digital to analog converter means in immediately subsequent stages, and so forth, with an exception that an output terminal of said n-th comparator means being not connected to any of said digital to analog converter means;
- and
- wherein a binary output of said first comparator means provides the most significant bit signal of an analog to digital conversion output, a binary output of said second comparator means provides the next most significant bit signal of said analog to digital conversion output, and so forth, a binary output of said n-th comparator means provides the least significant bit signal of said analog to digital conversion output.
9 more elements
Dependencies are inferred from the claim text.