Semiconductor integrated circuit apparatus having input/output portions impedance-matched for transmission lines
AssigneeNEC Corporation
InventorToru Ishikawa
Life of this patent
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Abstract
In a semiconductor integrated circuit apparatus, a semiconductor chip (device, or module) has input/output portions each connected to two external pins (or terminals). The two external pins are connected to an incoming transmission line and an outgoing transmission line, respectively. The following formula is satisfied: ##EQU1## where Z is an impedance of each of the transmission lines; L1 and L2 are inductances of the two pins; and C1 is a capacitance of each of the input/output portions.
Claims19
A semiconductor integrated circuit apparatus comprising:
- a semiconductor chip having an input/output means;
- first and second terminal means connected to said input/output means;
- and
- first and second transmission lines, connected to said first and second terminal means, respectively,
- wherein the following formula is substantially satisfied:
- ##EQU17## where Z is an impedance of each of said first and second transmission lines,
- L1 and L2 are inductances of said first and second terminal means, and
- C1 is a capacitance of said input/output means, and
- wherein said input/output means comprises a compensation capacitor, to substantially adjust the capacitance of said input/output means.
A semiconductor integrated circuit apparatus comprising:
- a semiconductor chip having an input/output means;
- first and second terminal means connected to said input/output means;
- and
- first and second transmission lines, connected to said first and second terminal means, respectively,
- wherein the following formula is substantially satisfied:
- ##EQU18## where Z is an impedance of each of said first and second transmission lines,
- L1 and L2 are inductances of said first and second terminal means, and
- C1 is a capacitance of said input/output means, and
- wherein said apparatus further comprises:
- first and second compensation capacitors connected to said first and second terminal means, respectively, to substantially adjust the capacitance of said input/output means.
A semiconductor integrated circuit apparatus comprising:
- a semiconductor chip having an input/output means;
- first and second terminal means connected to said input/output means;
- and
- first and second transmission lines, connected to said first and second terminal means, respectively,
- said input/output means comprising a compensation capacitor,
- wherein the following formula is substantially satisfied:
- ##EQU19## where Z is an impedance of each of said first and second transmission lines,
- L1 and L2 are inductances of said first and second terminal means,
- C1 is a capacitance of said input/output means, and
- C2 is a capacitance of said compensation capacitor.
A semiconductor integrated circuit apparatus comprising:
- a semiconductor chip having an input/output means;
- first and second terminal means connected to said input/output means;
- and
- first and second compensation capacitors connected to said first and second terminal means, respectively;
- first and second transmission lines, connected to said first and second terminal means, respectively,
- wherein the following formula is substantially satisfied:
- ##EQU20## where Z is an impedance of each of said first and second transmission lines,
- L1 and L2 are inductances of said first and second terminal means,
- C1 is a capacitance of said input/output means, and
- C3 and C4 are capacitances of said first and second compensation capacitors.
An apparatus for receiving a semiconductor integrated circuit, said apparatus comprising:
- a socket device having a contact means for contacting with said semiconductor integrated circuit;
- first and second terminal means connected to said contact means;
- and
- first and second transmission lines, connected to said first and second terminal means, respectively,
- wherein the following formula is substantially satisfied:
- ##EQU21## where Z is an impedance of each of said first and second transmission lines,
- L1 and L2 are inductances of said first and second terminal means, and
- C1 is a capacitance of said contact means, and
- wherein said apparatus further comprises:
- first and second compensation capacitors connected to said first and second terminal means, respectively, to substantially adjust the capacitance of said contact means.
An apparatus for receiving a semiconductor integrated circuit, said apparatus comprising:
- a device having a contact means for contacting with said semiconductor integrated circuit;
- first and second terminal means connected to said contact means;
- first and second compensation capacitors connected to said first and said second terminal means, respectively;
- and
- first and second transmission lines, connected to said first and second terminal means, respectively,
- wherein the following formula is substantially satisfied:
- ##EQU22## where Z is an impedance of each of said first and second transmission lines,
- L1 and L2 are inductances of said first and second terminal means,
- C1 is a capacitance of said contact means, and
- C3 and C4 are capacitances of said first and second compensation capacitors.
Dependencies are inferred from the claim text.