Method of manufacturing a semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsTakashi Kawakubo, Kazuhiro Eguchi, Shuichi Komatsu, Kazuhide Abe
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Abstract
A semiconductor memory device having a semiconductor substrate, an insulating layer provided on the substrate, and a memory cell. The memory cell has a switching transistor provided on the substrate and a charge storage element in a trench made in the insulating layer. The charge storage element has a bottom electrode, a dielectric layer and a top electrode deposited one on another in the order mentioned.
Claims45
A method of manufacturing a semiconductor memory device, comprising the steps of:
- forming a switching transistor in a semiconductor substrate;
- forming an insulating layer on the substrate so as to form a flat upper surface;
- forming a trench in the insulating layer;
- forming a first conductive layer made of a material selected from the group consisting of a noble metal, a noble metal oxide, a noble metal alloy, and an electrically conductive oxide, on an inner surface of the trench and on the insulating layer;
- and
- polishing the first conductive layer to remove that portion of said first conductive layer which is provided on the insulating layer, thereby forming a bottom electrode of a charge storage element.
A method of manufacturing a semiconductor memory device, comprising the steps of:
- forming a switching transistor in a semiconductor substrate;
- forming an insulating layer on the substrate so as to form a flat upper surface;
- forming a trench in the insulating layer;
- forming a first conductive layer on an inner surface of the trench and on the insulating layer;
- and
- polishing the first conductive layer by chemical-mechanical polishing, using a polishing solution containing a halogen, a halide and an organic solvent to remove that portion of said first conductive layer which is provided on the insulating layer, thereby forming a bottom electrode of a charge storage element.
A method of manufacturing a semiconductor memory device, comprising the steps of:
- forming a switching transistor in a semiconductor substrate;
- forming an insulating layer on the substrate so as to form a flat upper surface;
- forming a trench in the insulating layer;
- forming a first conductive layer on an inner surface of the trench and on the insulating layer;
- forming a flattening insulating film on the first conductive layer, thereby filling said trench;
- polishing the first conductive layer and the flattening insulating film to remove those portions of said first conductive layer and the flattening insulating film which are provided on the insulating layer, thereby forming a bottom electrode of a charge storage element;
- removing that portion of the flattening insulating film which is provided in said trench, thereby exposing said bottom electrode deposited in said trench;
- forming a dielectric layer on the exposed bottom electrodes in said trenches;
- and
- forming a second conductive layer on said dielectric layer, thereby forming a top electrode of said charge storage element.
A method of manufacturing a semiconductor memory device, comprising the steps of:
- forming a switching transistor in a semiconductor substrate;
- forming an insulating layer on the substrate so as to form a flat upper surface;
- forming a trench in the insulating layer;
- forming a first conductive layer on an inner surface of the trench and on the insulating layer;
- forming a dielectric layer on said first conductive layer;
- forming a second conductive layer on said dielectric layer, said second conductive layer to be processed to provide a top electrode of said charge storage element;
- forming a flattening insulating film on said second conductive layer;
- and
- polishing to remove those portions of the first conductive layer, said dielectric layer, said second conductive layer and said insulating film, which are provided on said semiconductor substrate.
Dependencies are inferred from the claim text.