Apparatus and method for analyzing circuits using reduced-order modeling of large linear subscircuits
AssigneeLucent Technologies Inc.
InventorsPeter Feldmann, Roland Wilhelm Freund
Life of this patent
Estimating the term…
Abstract
A circuit analyzer and method are disclosed for generating and outputting a Matrix Pade via Lanczos (MPVL) approximation of a frequency response of a circuit from input circuit parameters. A processing unit has a memory for storing circuit characteristic data representing a circuit; a program for generating matrix transfer function data relating to a matrix transfer function associated with the circuit characteristic data; a processor for executing the program; and the processing unit generates the frequency response signal in response to the matrix transfer function data.
Claims22
An apparatus comprising:
- a processing unit having:
- a memory for storing circuit characteristic data representing a circuit;
- a program for generating matrix transfer function data relating to a matrix transfer function associated with the circuit characteristic data;
- a processor for executing the program;
- and
- means for generating the frequency response signal in response to the matrix transfer function data.
An apparatus for generating a frequency response signal indicative of an frequency response of a circuit, the apparatus comprising:
- a data source providing circuit characteristic data representing the circuit;
- and
- a processing unit having:
- a memory for receiving and storing the circuit characteristic data from the data source;
- a set of at least one program including a Matrix Pade Via Lanczos (MPVL) program for generating a matrix Pade approximant of a transfer function relating to a matrix transfer function associated with the circuit characteristic data;
- a processor for executing the MPVL program;
- and
- means for generating the frequency response signal in response to the matrix Pade approximant.
A circuit analyzer for generating a graphic representation of a predicted performance of a circuit, the circuit analyzer comprising:
- an input device for inputting a plurality of circuit parameters representing the circuit;
- memory and stored programs for receiving and storing the circuit parameters;
- a processor operating with the stored programs and including:
- means for processing the circuit parameters;
- means for performing a block Lanczos procedure on the processed parameters;
- means for calculating a matrix Pade approximant of a transfer function of the circuit;
- and
- means for generating the graphic representation from the matrix Pade approximant to predict the performance of the circuit;
- and
- a display for displaying the graphic representation.
A method for generating a frequency response signal of a circuit, the method comprising the steps of:
- providing circuit characteristic data associated with the circuit;
- providing characteristic matrix data associated with the circuit characteristic data and representing parameters associated with a characteristic matrix;
- executing a program using a processing unit to generate matrix transfer function data relating to a matrix transfer function associated with the characteristic matrix data;
- and
- generating the frequency response signal in response to the matrix transfer function data.
A method for analyzing a circuit to predict performance of a circuit, comprising the steps of:
- receiving a plurality of circuit parameters representing the circuit from an input device;
- storing the received circuit parameters in memory;
- processing the circuit parameters to generate characteristic matrix data representing parameters associated with a characteristic matrix;
- performing a block Lanczos procedure on the processed parameters to generate a plurality of Lanczos vectors;
- calculating a matrix Pade approximant of a transfer function of the circuit from the plurality of Lanczos vectors;
- generating a graphic representation from the matrix Pade approximant to predict the performance of the circuit;
- and
- displaying the graphic representation on a display.
Dependencies are inferred from the claim text.