Time interval measurement system and a method applied therein

A time interval measurement system comprising:

• means for generating a measurement pulse having a pulse width of a time interval to be measured;
• means for generating a series of delayed pulses, a first of said series of delayed pulses being said measurement pulse, each (k+1)-th of said series of delayed pulses having a same pulse width with said measurement pulse and being delayed by a unit delay time from k-th of said series of delayed pulses, and last of said series of delayed pulses being delayed from said measurement pulse more than two cycles of a system clock, k being a positive integer;
• means for reforming each of said series of delayed pulses into a series of quantized pulses, each k-th of said series of quantized pulses being synchronized with said system clock and having a width of a pulse rising at a first rising edge of said system clock following a rising edge of k-th of said series of delayed pulses and falling at a first rising edge of said system clock following a falling edge of said k-th of said series of delayed pulses;
• means for generating a series of discriminate number measurement pulses, each k-th of said series of discriminate number measurement pulses rising at a time common for every of said series of discriminate number measurement pulses and falling at a falling edge of k-th of said series of delayed pulses;
• a series of one-bit-counters, each k-th of said series of one-bit-counters counting a number of rising edges of said system clock during a period enabled with k-th of said series of discriminate number measurement pulses;
• a series of multi-bit counters, at least three of said series of multi-bit counters having a bit width sufficient for counting rising edges of said system clock during said time interval to be measured and the others of said series of multi-bit counters having a bit width of two, each k-th of said series of multi-bit counters counting a number of rising edges of said system clock during a period enabled with k-th of a first half of said series of quantized pulses;
• and
• control means for detecting a longest sequence of a same logic of outputs of said series of one-bit-counters and determining a discriminate number as a number of one-bit-counters outputting said longest sequence of a same logic, controlling addition means to accumulate and output a first total number of outputs of said at least three of said series of multi-bit counters for obtaining an average value of said outputs of said at least three of said multi-bit counters and to accumulate and output a second total number of outputs of a first sequence of said discriminate number of said series of multi-bit counters including lower two bits of said at least three adding to each of said outputs of a first sequence of said discriminate number with a compensate number according to a value of a residue of said average value divided by four for compensating over flowed figures therefrom, and calculating said time interval to be measured by multiplying a cycle time of said system clock by a sum of a binary value of bits higher than two of said average value and said second total number divided by said discriminate number and subtracted with said compensate number.

A method of time interval measurement comprising steps of:

• generating a measurement pulse having a pulse width of a time interval to be measured;
• generating a series of delayed pulses, a first of said series of delayed pulses being said measurement pulse, each (k+1)-th of said series of delayed pulses having a same pulse width with said measurement pulse and being delayed by a unit delay time from k-th of said series of delayed pulses, and last of said series of delayed pulses being delayed from said measurement pulse more than two cycles of a system clock, k being a positive integer;
• reforming each of said series of delayed pulses into a series of quantized pulses, each k-th of said series of quantized pulses being synchronized with said system do& and having a width of a pulse rising at a first rising edge of said system clock following a rising edge of k-th of said series of delayed pulses and falling at a first rising edge of said system clock following a falling edge of said k-th of said series of delayed pulses;
• generating a series of discriminate number measurement pulses, each k-th of said series of discriminate number measurement pulses rising at a common time and falling at a falling edge of k-th of said series of delayed pulses;
• outputting a series of one bit values, each k-th of said one bit values indicating odd or even of a number of rising edges of said system clock during a period at a high level of k-th of said series of discriminate number measurement pulses;
• determining a discriminating number as a number of one bit values of a longest sequence of a same value of said series of one bit values;
• obtaining an average value of a series of multi-bit values, each k-th of said series of multi-bit values indicating a number of rising edges of said system clock during a period at a high level of k-th of a first sequence of said discriminate number of said series of quantized pulses;
• and
• calculating said time interval to be measured by multiplying said average value by a cycle time of said system clock.

A method of time interval measurement comprising steps of:

• generating a measurement pulse having a pulse width of a time interval to be measured;
• generating a series of delayed pulses, a first of said series of delayed pulses being said measurement pulse, each (k+1)-th of said series of delayed pulses having a same pulse width with said measurement pulse and being delayed by a unit delay time from k-th of said series of delayed pulses, and last of said series of delayed pulses being delayed from said measurement pulse more than two cycles of a system clock, k being a positive integer;
• reforming each of said series of delayed pulses into a series of quantized pulses, each k-th of said series of quantized pulses being synchronized with said system clock and having a width of a pulse rising at a first rising edge of said system clock following a rising edge of k-th of said series of delayed pulses and falling at a first rising edge of said system clock following a falling edge of said k-th of said series of delayed pulses;
• generating a series of discriminate number measurement pulses, each k-th of said series of discriminate number measurement pulses rising at a common time and falling at a falling edge of k-th of said series of delayed pulses;
• outputting a series of one bit values, each k-th of said one bit values indicating odd or even of a number of rising edges of said system clock during a period of a high level of k-th of said series of discriminate number measurement pulses;
• determining a discriminating number as a number of one bit values of a longest sequence of a same value of said series of one bit values;
• obtaining a first average value of at least three of multi-bit values, each of said at least three of multi-bit values indicating a number of rising edges of said system clock during a period of a high level of each of at least three of a first sequence of said discriminate number of said series of quantized pulses;
• calculating a residue of said first average value divided by four;
• obtaining a second average value of a series of binary values of two bits, each of said series of binary values of two bits indicating a value of lower two bits of a number of rising edges of said system clock during a period of a high level of each of said first sequence of said discriminate number of said series of quantized pulses added with a compensate number according to value of said residue for compensating overflowed figures from said lower two bits;
• and
• calculating said time interval to be measured by multiplying a cycle time of said system clock by a sum of a binary value of bits higher than two of said first average value and said second average value subtracted with said compensate number.