Semiconductor memory device

A semiconductor memory device comprising:

• a plurality of memory blocks including a first memory block, each of the memory blocks including a plurality of memory cells;
• a plurality of redundant blocks including first and second redundant blocks, each of the redundant blocks being selectively used to replace one of the memory blocks;
• switch means for replacing the first memory block with the first redundant block;
• and
• prohibiting means for prohibiting the first memory block, which has been replaced by the first redundant block, from being selected in response to a selection input signal which simultaneously selects all of the memory blocks,
• wherein the prohibiting means also prohibits the second redundant block, which is not being used to replace one of the memory blocks, from being selected in response to the selection input signal, and
• the prohibiting means includes a plurality of first block selecting circuits;
• one of the first block selecting circuits being provided for each of the memory blocks, the first block selecting circuit including:
• a first signal path having a first plurality of logic gates;
• first signal inverter means for inverting a signal passing through the first logic gates in response to the selection input signal;
• and
• first signal path blocking means for blocking a second signal path between the first signal path and the first signal inverter means when the corresponding memory block has been replaced by one of the redundant blocks.