Integrated circuit design and manufacturing method and an apparatus for designing an integrated circuit in accordance with the method

A method for designing a microprocessor integrated circuit having a particular operation, the method comprising the steps of:

• receiving a behavioral circuit model defining, in several lines of code, the particular operation of the microprocessor integrated circuit;
• forming a physical design file using the behavioral circuit model wherein the physical design file is formed by generating a two-dimensional integrated circuit layout from lines of code of the behavioral circuit model, wherein the two-dimensional integrated circuit layout contains selected electrical devices selected from a library in memory where the library stores a plurality of electrical devices, the selected electrical devices being connected in accordance with the behavioral circuit model, each electrical device in the library having a unique combination of:
• (1) logic function;
• (2) drive strength;
• (3) power rail sizing;
• and (4) physical pitch when compared to all other electrical devices in the library;
• and
• automatically replacing selected logic devices in the two-dimensional integrated circuit layout to other electrical devices selected from the library in a time iterative manner so that some optimization of all of physical pitch, drive strength, and power rail sizing is achieved for at least one electrical device within the two-dimensional integrated circuit layout.

A method for forming a plurality of microprocessor integrated circuits comprising the steps of:

• receiving a behavioral circuit model defining, in several lines of code, a plurality of logic functions which are inter-coupled to perform a microprocessor operation;
• processing the behavioral circuit model to generate a data file containing a plurality of predetermined library-defined logic gates interconnected to perform the operation described via the behavioral circuit model, wherein each predetermined library-defined logic gate in the plurality of predetermined library-defined logic gates used within the data file is unique from all other predetermined library-defined logic gates in the predetermined library-defined logic gates;
• further processing the behavioral circuit model wherein each predetermined library-defined logic gate in the data file is set to a particular strength;
• further processing the data file to determine a size of power rails for each predetermined library-defined logic gate in the data file;
• further processing the data file to determine a physical two-dimensional layout of each predetermined library-defined logic gate in the data file;
• placing and routing each predetermined library-defined logic gate in the data file in an integrated circuit layout to form a physical design file used to physically define the plurality of integrated circuits;
• and
• using layout data, provided via the physical design file, to manufacture the plurality of integrated circuits wherein each integrated circuit in the plurality of circuits has a operation substantially similar to the operation of the behavioral circuit model.

A microprocessor circuit design tool stored on storage media, the circuit design tool comprising:

• a plurality of binary values for receiving a circuit input file defining, in several lines of code, a plurality of logic gates which are inter-coupled;
• a plurality of binary values for processing the circuit input file to assign one predetermined library-defined logic gate to each logic gate described within the circuit input file, each predetermined library-defined logic gate which is assigned being unique in cell pitch, drive strength, logic function, and power rail sizing combination from all other predetermined library-defined logic gates;
• a plurality of binary values for further processing the circuit input file wherein each logic gate in the circuit input file is set to a particular strength;
• a plurality of binary values for further processing the circuit input file to determine a size of power rails for each logic gate in the circuit input file;
• a plurality of binary values for further processing the circuit input file to determine a physical two-dimensional layout of each logic gate in the circuit input file;
• a plurality of binary values for placing and routing each logic gate in the circuit input file in an integrated circuit layout to form a physical design file of an integrated circuit;
• and
• a plurality of binary values for using placement data, provided via the physical design file, to result in manufacture of the integrated circuit.

A microprocessor circuit design tool stored on storage media, the circuit design tool comprising:

• a first plurality of binary values for receiving a circuit input file defining, in several lines of code, a plurality of microprocessor electrical devices which are inter-coupled;
• a second plurality of binary values, serially accessed after the first plurality of binary values, for forming a physical design file from the circuit input file wherein the physical design file is formed by mapping the plurality of electrical devices represented via the several lines of code to two-dimensional layout electrical devices wherein the two-dimensional layout electrical devices are selected from a library in memory, the library storing a plurality of two-dimensional layout electrical devices wherein each electrical device in the plurality of electrical devices is mapped to one two-dimensional layout electrical device in the library, each two-dimensional layout electrical device in the library having a unique (1) logic function;
• (2) device strength;
• (3) power raft sizing;
• and (4) geometric layout when compared to all other two dimensional layout electrical devices in the library;
• and
• a third plurality of binary values, serially accessed after the second plurality of binary values, for automatically replacing the two-dimensional electrical devices in the physical design file to other electrical devices selected from the library, the replacement being performed in a time iterative manner so that some optimization of all of physical pitch, drive strength, and power rail sizing is achieved for at least one electrical device within the physical design file.

A circuit design tool stored on storage media, the circuit design tool comprising:

• means for receiving a circuit input file defining, in several lines of code, a plurality of logic gates which are inter-coupled;
• means for processing the circuit input file to assign one predetermined library-defined logic gate to each logic gate described within the circuit input file, each predetermined library-defined logic gate which is assigned being unique in cell pitch, drive strength, logic function, and power rail sizing combination from all other predetermined library-defined logic gates;
• means for further processing the circuit input file wherein each logic gate in the circuit input file is set to a particular strength;
• means for further processing the circuit input file to determine a size of power rails for each logic gate in the circuit input file;
• means for further processing the circuit input file to determine a physical two-dimensional layout of each logic gate in the circuit input file;
• means for placing and routing each logic gate in the circuit input file in an integrated circuit layout to form a physical design file of an integrated circuit;
• and
• means for using placement data, provided via the physical design file, to result in manufacture of the integrated circuit.