Internal state determining apparatus

An internal state determining apparatus for use with peripheral circuitry to determine that the peripheral circuitry assumes one of a plurality of possible internal states, the apparatus comprising:

• an interface control circuit activated by a first voltage and subsequently activated by a second voltage, the first and second voltages being supplied to the interface control circuit from an external device which is external to the peripheral circuitry, the interface control circuit being in a predetermined state before being supplied with the first and second voltages;
• voltage detecting means for detecting a change from the first voltage to the second voltage, and for outputting a voltage detected signal in response to the change in voltage;
• and
• internal state determining means for producing a reset signal to the interface control circuit in response to the voltage detected signal for resetting the interface control circuit to the predetermined state:
• wherein the voltage detected signal comprises first and second signals each having a first level and a second level, and wherein the internal state determining means outputs the reset signal to the interface control circuit when the first and second signals both have the same level.

An internal state determining apparatus for use with a peripheral device to determine that the peripheral device assumes one of a plurality of possible internal states, the apparatus comprising:

• an inner circuit of the peripheral device which is activated by a first voltage and subsequently activated by a second voltage, the first and second voltages being supplied to the inner circuit from an external device which is external to the peripheral device, the inner circuit being in a predetermined state before being supplied with the first and second voltages;
• an interface control circuit operatively coupled to the inner circuit and having:
• a plurality of clock generators for generating clock signals which are different from one another, and which are selectively supplied to the inner circuit;
• and
• a plurality of interface circuits for receiving signals input from the external device and respectively selectively supplying internal signals to the inner circuit;
• voltage detecting means for detecting a change from the first voltage to the second voltage, and for outputting a voltage detected signal in response to the change in voltage;
• and
• internal state determining means for selecting one of the plurality of clock generators and for selecting one of the plurality of interface circuits, in response to the voltage detected signal, and thereby causing the interface control circuit to output a selected clock signal and selected internal signals to the inner circuit.

An integrated circuit card which has two activation states corresponding to two voltages, comprising:

• a first circuit activated by a first voltage and subsequently activated by a second voltage, both the first and second voltages being supplied from an external host system, external to the integrated circuit card, the first circuit having a predetermined state before being supplied with the first and second voltages;
• a detecting circuit for detecting a change from the first voltage to the second voltage, and for outputting a voltage detected signal in response to the change of voltage;
• and
• an internal state determining circuit for providing a reset signal to the first circuit in response to the voltage detected signal for resetting the first circuit to the predetermined state:
• wherein the voltage detected signal comprises first and second signals each having a first level and a second level, and wherein the internal state determining circuit outputs the reset signal to the first circuit when the first and second signals both have the same level.

A storage device adapted for connecting with an external host device and being provided with a supply voltage from the external host device, comprising:

• a memory for storing data;
• an interface/control circuit for controlling data transfer between the external host device and the memory;
• a voltage detection circuit for detecting a change in the supply voltage level, and for outputting a first voltage detected signal when the supply voltage level exceeds a first predetermined operational voltage level, and for outputting a second voltage detected signal when the supply voltage level exceeds a second predetermined operational voltage level;
• and
• a reset circuit for resetting the interface/control circuit in response to a coincidence of the first and second voltage detected signals respectively.

An internal state determining apparatus comprising:

• an input terminal for receiving a source voltage signal having a voltage value between first and second voltage levels;
• a detecting circuit operatively coupled to the input terminal, for outputting at least one detected signal during a first period when the voltage value of the voltage source is at or between the first voltage level and a third voltage level, and during a second period when the voltage value of the source voltage is at or between the third voltage level and the second voltage level, the third voltage level being a voltage level between the first voltage and the second voltage levels;
• and
• a reset circuit operatively coupled to the detecting circuit, for outputting a reset signal in dependence on the at least one detected signal.

An internal state determining apparatus for use with a device having a plurality of inner circuits, the apparatus comprising:

• an input terminal for receiving a source voltage signal having a voltage value between first and second voltage levels;
• a detecting circuit operatively coupled to the input terminal, for outputting at least one detected signal during a first period when the voltage value of the voltage source is at or between the first voltage level and a third voltage level, and during a second period when the voltage value of the source voltage is at or between the third voltage level and the second voltage level, the third voltage level being a voltage level between the first voltage and the second voltage levels;
• an interface control circuit operatively coupled to the plurality of inner circuits and having:
• a plurality of clock generators for generating clock signals which are different from one another, and which are selectively supplied to the plurality of inner circuits;
• and
• a plurality of interface circuits for receiving signals input through the input terminal and respectively selectively supplying internal signals to the plurality of inner circuits;
• and
• a select circuit for selecting one of the plurality of clock generators and one of the plurality of interface circuits, in response to the detected signal.