High efficiency power MOS switch
AssigneeHarris Corporation
InventorLawrence George Pearce
Life of this patent
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Abstract
A power MOS switch (40) is an array of MOS devices that includes alternating drain columns and source columns. Each drain column includes a plurality of separate drain regions (300) that are closely spaced one from another, and each source column includes a continuous narrow elongated source distribution region (302) that extends the length of the column. A plurality of narrow source distribution branch regions (302) are connected to the elongated region and extend transversely from the elongated region at least partially between each separate drain region in each drain column adjacent to the source column. A gate region (303) separates the drain regions in each column from the adjacent source distribution regions.
Claims15
A power MOS switch comprising:
- an array of repeating alternating drain columns and source columns;
- each drain column being closely spaced one from another and comprising a plurality of separate drain regions closely spaced one from another;
- each source column comprising a continuous narrow elongated source distribution region extending the length of the column and a plurality of narrow source distribution branch regions intersecting and connected to said continuous narrow elongated source distribution region and extending transversely from said continuous narrow elongated source distribution region at least partially between each separate drain region in each drain column adjacent to said source column, said source distribution regions being narrower than each said separate drain region;
- and
- a gate region separating the drain regions in each said drain column from the adjacent source distribution regions.
Dependencies are inferred from the claim text.