Insulated-gate semiconductor device

A semiconductor device comprising:

• a first semiconductor layer of a second conductivity type;
• a second semiconductor layer of a first conductivity type formed in a surface of said first semiconductor layer, for allowing first type charge carriers to be injected into said first semiconductor layer;
• a third semiconductor layer of said second conductivity type formed in a surface of said first semiconductor layer, for allowing second type charge carriers to be injected into said first semiconductor layer to cause a conductivity modulation to occur therein;
• a fourth semiconductor layer of the said conductivity type formed in said first semiconductor layer, for allowing said first type charge carriers contained in said first semiconductor layer to move externally out of said first semiconductor layer;
• a MOS channel for selectively connecting said first semiconductor layer and said third semiconductor layer in order to thereby turn on and turn off said device;
• a gate electrode facing said MOS channel;
• first injection enhancer means for locally controlling a flow capability of the first type charge carriers in order to thereby increase an ability to inject the second type charge carriers into said first semiconductor layer, said first injection enhancer means comprising a first narrow current path connecting said first semiconductor layer and said fourth semiconductor layer such that a resistance to a flow of the first type charge carriers is locally increased in said first narrow current path;
• a first main electrode connected to said second semiconductor layer;
• and
• a second main electrode connected to said third and fourth semiconductor layers, said first and second main electrodes being arranged on one side of said device.