Main memory buffer for low cost / high performance input/output of data in a computer system

A memory interface for transferring data between a memory of a computer system and an input/output device, said interface comprising:

• an address register for addressing data within said memory said address register comprising, plurality of page number bits, and a plurality of counter bits concatenated to a low order bit of said page number bits;
• a data buffer for storing at least one unit of data being transferred, said data buffer having a data ready signal that indicates when said data buffer can transfer data;
• a state machine for accessing said memory at an address contained in said address register to transfer a unit of data between said memory and said data buffer when said data ready signal is set to a predetermined value, wherein said state machine increments said counter bits each time said state machine accesses said memory and further wherein said state machine sends an interrupt signal to a processor of aid computer system each time a carry out occurs from said counter bits, wherein interrupts are created without comparing said bits to another register.