Register array for utilizing burst mode transfer on local bus
AssigneeNVIDIA Corporation
InventorCurtis Priem
Life of this patent
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Abstract
Apparatus and a method by which an application program writing a series of commands to a single destination on an input/output bus increments the addresses to which the commands are addressed as the commands are written so that the commands may be transferred utilizing the burst mode of the input/output bus, and the device receiving the data decodes a large number of sequential addresses to the same destination so that the input/output device transfers all of the commands in the sequence of addresses to the single destination.
Claims8
A method for decoding addresses on a bus which provides a burst transfer mode which may be utilized for rapidly transferring commands to sequential addresses, the method including the steps of:
- addressing a sequence of commands intended for the same address to a sequence of serial addresses,
- transferring the commands on the bus utilizing the burst transfer mode, and
- decoding all of the serial sequence of commands to the same destination.
Apparatus for rapidly transferring commands to a single address in a computer system comprising:
- a bus utilizing a burst transfer mode in which commands are addressed to a serial sequence of addresses, and
- decoding circuitry decoding all of a serial sequence of commands to the same destination.
A computer system comprising
- a central processing unit;
- a bus utilizing a burst transfer mode in which commands are addressed to a serial sequence of addresses;
- main memory;
- and
- an input/output circuit including decoding circuitry decoding all of a serial sequence of commands to the same destination.
Dependencies are inferred from the claim text.