Communication apparatus and methods having P-MAC, I-MAC engines and buffer bypass for simultaneously transmitting multimedia and packet data

In a data processing system comprising a system bus including a memory coupled to the system bus, a communication device for transferring real time/multimedia and packet data between a network and the system bus comprising:

• a controller which simultaneously receives and transmits real time packet and isochronous data between the network and the system bus;
• the controller including a steering map table for mapping isochronous data to isochronous transmit/receive queues a storage means;
• the storage means configurable into a preselected number of receive and transmit queues for simultaneously buffering packet and isochronous data transmitted in either direction between the system bus and the network in either direction;
• interfacing means for initiating packet and isochronous data transfers to the system bus;
• the interfacing means including a slave transmit port which allows the system to write data directly into the queues with the interfacing means acting as a bus slave;
• control means interfacing the controller and the interfacing means for providing a descriptor list of addresses for writing or reading packet and isochronous data to the memory in the system;
• and
• the control means including a local bus interface coupled to the interfacing means and the controller, the local bus interfacing means providing read/write access to the storage means through memory mapped registers;
• access to controller internal registers allowing a local processor to configure and control the controller operation and the generation of interrupts to a local processor or an error condition.

In a data processing system comprising a system bus including a host memory coupled to the system bus, a communication device for transferring real time/multimedia and packet data between a network and the system bus comprising:

• a sole controller which simultaneously receives and transmits real time packet and isochronous data between the network and the system bus serving a host system;
• the controller including P-Mac and I-Mac engines;
• a storage means configurable into a preselected number of receive and transmit queues for simultaneously buffering packet and isochronous data transmitted in either direction between the system bus and the network in either direction;
• interfacing means for initiating packet and isochronous data transfers to or from the system bus, either directly or through the storage means;
• local control means coupled to a local bus interface for interfacing the controller and the interfacing means for providing a descriptor list of addresses for writing or reading packet and isochronous data to the host memory in the data processing system;
• and
• e) medium access control means coupled to the P-Mac and I-Mac engines for transferring packet and multimedia data, respectively, in both directions to or from the network.

A communication device for transferring real time/multimedia and packet data between a network and a system bus comprising:

• a) controller means for receiving and transmitting the multimedia and packet between the network and the system bus;
• b) storage means under control of the controller means for storing the multimedia and packet data in queues for transfer to the system bus or the network;
• c) interfacing means between the controller and the system bus for simultaneously transferring the multimedia and packet data to or from the system bus or the network;
• d) the interface means including a direct memory access (DMA) engine, a shared memory buffer, transmit and receive engines and a slave transmit port, the DMA engine controlling the delivery of data between the system bus and a control means;
• the shared memory buffer mapping memory space in the system bus to memory space in the control means;
• the transmit engine controlling the delivery of data to selected queues in the storage means from the system or the control means;
• the receive engine controlling the delivery of data from selected queues in the storage means to the system bus or the control means, and the slave transmit port mapping selected queues of the storage means to memory space connected to the system bus for writing data directly into the queues from the system without using the controller means;
• and
• e) the control means further providing and controlling addresses of multimedia or packet data transferred to or from the system bus by the interfacing means.

A method of simultaneously transferring real time/multimedia packet data between a system bus and a network comprising the steps of:

• transferring data from the system bus to storage queues in a FDDI RAM buffer using a transmit engine, the transmit engine issuing a request to a local bus interface to fetch descriptors indicative of the addresses of the data in the system to be transferred;
• transferring data stored in the queues as packet frames to a P-MAC transmit engine, the P-MAC transmit engine notifying a queue manager on the last byte that a frame has been transmitted;
• transferring data stored in the queues as isochronous data to an I-MAC engine, the data being only transferred if a steering map table entry for that data is active and the queue is enabled;
• transmitting the isochronous data to the network when a token is captured;
• and
• transmitting packet data buffered to the network as long as a token holding timer has not expired.

A method of simultaneously transferring real time/multimedia and packet data between a network and a system bus comprising the steps of:

• storing packet data in a PMAC indicate engine and isochronous data in an IMAC indicate engine;
• transferring the stored data to receive queues in a storage means, the isochronous and packet data being stored in different sets of queues configured by a parameter RAM;
• defining a threshold for transmitting data from the queues to the system using a programmable threshold register, the threshold defining the amount of data buffered in a queue before transfer to the system;
• accessing a queue status register to identify queues available for transfer of data to the system;
• and
• transferring data from the queues to the system or a local bus using a receive engine, the local bus providing descriptor identification of the location in the system memory for the storage of the data.