Method and circuit for checking operation of input buffers of a semiconductor circuit

A method for checking operation states of input buffers of a semiconductor integrated circuit, said semiconductor integrated circuit comprising a plurality of input terminals;

• input buffers which are respectively provided for said input terminals, for receiving input signals through said input terminals;
• and leading means for leading input signals of said input buffers to an output terminal, said method comprising the steps of:
• applying to said input terminals, allowable levels of testing voltages as the input signals for the input buffers to test characteristics of the input buffers, including gradually changing the levels of testing voltages to critical voltages at which operation of the input buffers change;
• and
• measuring output signals of the input buffers in response to the allowable levels of voltages to check operation states of said input buffers, changes of the operation states occurring at the critical voltages,
• wherein leading means includes nothing to distort the output signals of the input buffers.

A semiconductor integrated circuit system, comprising:

• a plurality of input terminals for a semiconductor integrated circuit;
• input buffers which are provided for the input terminals, respectively, for receiving input testing signals from said input terminals, to test characteristics of the input buffers;
• internal circuits of the semiconductor integrated circuit, connected to the input buffers;
• an output terminal used for determining operation states of the input buffers, and means for applying a plurality of different voltages as the input testing signals to the input terminals, gradually changing the plurality of different voltages to critical voltages at which operation of the input buffers change and measuring output signals of the input buffers, which are output in response to the plurality of different voltages;
• and
• leading means for leading the output signals of the input buffers to said output terminal, without passing through the internal circuits,
• wherein said leading means includes nothing to distort the output signals of the input buffers.

A method of testing using a semiconductor integrated circuit having a plurality of input terminals, a plurality of input buffers each connected to one of said plurality of input terminals, an external output terminal, and internal circuits connectable between respective ones of the input buffers and the external output terminal, comprising the steps of:

• inputting input signals into said plurality of input terminals to drive the plurality of input buffers, including gradually changing the input signals to critical voltage at which operation of the input buffers change;
• latching an output signal of each of said input buffers;
• and
• successively outputting said output signals of said input buffers to the external output terminal, undistorted by operation of the internal circuits of the semiconductor integrated circuit, to test whether the input buffers each indicate whether a respective one of the input signals has an allowable voltage,
• wherein said leading means includes nothing to distort the output signals of the input buffers.

A method of testing using a semiconductor integrated circuit having a plurality of input terminals, a plurality of input buffers each connected to one of said plurality of input terminals, an external output terminal, and internal circuits between respective ones of the input buffers and the external output terminal, comprising the steps of:

• inputting input signals into said plurality of input terminals to drive the plurality of input buffers, including gradually changing the input signals to critical voltages at which operation of the input buffers change;
• latching an output signal of each of said input buffers;
• and
• successively outputting said output signals of said input buffers to the external output terminal, undistorted by operation of the internal circuits of the semiconductor integrated circuit, to test whether the input buffers each indicate that a respective one of the input signals has a voltage that yields a lower limit or an upper limit,
• wherein said leading means includes nothing to distort the output signals of the input buffers.