US 5,687,128 A · Power supply voltage boosting circuit of semiconductor memory device

Abstract

An active power supply voltage boosting circuit for a semiconductor memory device according to the present invention causes operation of the active cycle boosted voltage generating circuit to elevate the level of the boosted power supply voltage V.sub.PP when the detected level of the boosted power supply voltage V.sub.PP is lower than a target voltage level. Thus, the boosted power supply voltage V.sub.PP can be stably maintained to the target voltage level. When the boosted power supply voltage V.sub.PP becomes higher than the target voltage level, generation of the boosted power supply voltage V.sub.PP is stopped, and as a result, unwanted consumption of the electrical current and also the damage to the semiconductor memory device by high voltage can be prevented.

Claims26

Dependent claims

A power supply voltage boosting circuit of a semiconductor memory device comprising:

a boosted power supply voltage detecting circuit which, when an active cycle signal is input, generates an activation oscillation control signal when a boosted power supply voltage is lower than a target voltage level;
and
a boosted power supply voltage generating circuit which, when said activation oscillation control signal is input, generates said boosted power supply voltage.

A power supply voltage boosting circuit of a semiconductor memory device comprising:

an active cycle detector for generating a detection enable signal during an active cycle and maintaining said detection enable signal for a predetermined period longer than said active cycle;
a boosted power supply voltage detecting circuit which, when said detection enable signal is input, generates an activation oscillation control signal when a boosted power supply voltage is lower than a target voltage level;
and
a boosted power supply voltage generating circuit which, when said activation oscillation control signal is input, generates said boosted power supply voltage.

1 more element

A power supply voltage boosting circuit of a semiconductor memory device comprising:

a clock generator which receives an active cycle signal and generates a master clock signal;
an active cycle detector for generating a detection enable signal using said master clock signal and a self refresh mode signal, said active cycle detector maintaining said detection enable signal for a predetermined period longer than said master clock signal and deactivating said detection enable signal when said self refresh mode signal is received;
a boosted power supply voltage detecting circuit which, when said detection enable signal is input, generates an activation oscillation control signal when a boosted power supply voltage is lower than a target voltage level;
and
a boosted power supply voltage generating circuit which, when said activation oscillation control signal is input, generates said boosted power supply voltage.

2 more elements

Dependencies are inferred from the claim text.

Power supply voltage boosting circuit of semiconductor memory device

Life of this patent

Power supply voltage boosting circuit of semiconductor memory device

Life of this patent

Abstract

Claims26