Average luminance level detection apparatus and aspect ratio auto-discrimination apparatus for a television signal using the same
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsMasahiro Tani, Naoji Okumura
Life of this patent
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Abstract
A high precision aspect ratio auto-discrimination apparatus used for display apparatuses and television receivers comprising: an apparatus for detecting the upper edge and lower edge of a letter box picture through detecting the average luminance of every horizontal scan period; an apparatus for detecting respective average luminance levels in a plurality of specific regions in one field picture controlled by a horizontal synchronous signal and a vertical synchronous signal; and, an aspect ratio discrimination section to which the outputs of said both apparatuses are input.
Claims5
An average luminance level detection apparatus comprising:
- a counter to which a pulse signal H synchronizing with a horizontal synchronizing signal is input as a reset input;
- a control pulse generation circuit to which a count output CN of said counter is input;
- a first integration circuit to which a luminance signal Y and a first output P1 of said control pulse generation circuit are input;
- a second integration circuit to which the luminance signal Y and a second output P2 of said control pulse generation circuit are input;
- a third integration circuit to which the luminance signal Y and a third output P3 of said control pulse generation circuit are input;
- a first flip-flop to which an output Q1 of said first integration circuit and a vertical synchronizing signal V as a trigger signal are input;
- a second flip-flop to which an output Q2 of said second integration circuit and the vertical synchronizing signal V as the trigger signal are input;
- a third flip-flop to which an output Q3 of said third integration circuit and the vertical synchronizing signal V as the trigger signal are input;
- a first division to which an output T1 of said first flip-flop is input;
- a second division circuit to which an output T2 of said second flip-flop is input;
- and,
- a third division circuit to which an output T3 of said third flip-flop is input.
Dependencies are inferred from the claim text.