Semiconductor integrated circuit having VCO coupled through capacitance and buffer circuits

A semiconductor IC comprising:

• a substrate;
• a VCO portion disposed on said substrate;
• an internal circuit disposed on said substrate;
• a differential buffer circuit connected to said internal circuit and arranged on said substrate to cut off direct current between said VCO portion and said internal circuit;
• a capacitor having a first terminal connected to said VCO portion and a second terminal connected to said differential buffer;
• and
• a constant voltage source connected to said differential buffer circuit.

A semiconductor IC comprising:

• a substrate;
• a VCO portion disposed on said substrate, said VCO portion having an input and an output;
• an internal circuit disposed on said substrate;
• a differential buffer circuit having an input and an output, said differential buffer circuit being arranged on said substrate to cut off direct current between said VCO portion and said internal circuit;
• a series circuit of a resistor and a capacitor, a first end of said series circuit being connected to the output of said VCO portion, and a second end of said series circuit being connected to the input of said differential buffer circuit;
• and
• a constant voltage source connected to the input of said differential buffer.

A semiconductor IC on a silicon wafer chip comprising:

• a VCO portion;
• a single buffer;
• a first capacitor connected to said VCO portion and to said single buffer to cut off direct current flow between said VCO and said single buffer;
• a differential buffer;
• an internal circuit connected to said differential buffer;
• and
• a second capacitor having a first terminal connected to said single buffer and a second terminal connected to said differential buffer.

A semiconductor IC on a silicon wafer chip comprising:

• a VCO portion;
• a single buffer;
• a first capacitor connected to said VCO portion and to said single buffer to cut off direct current flow between said VCO and said single buffer;
• an internal circuit;
• and
• a series circuit of a second capacitor and a resistor connected to said single buffer and said internal circuit for separating said single buffer from said internal circuit.

A semiconductor IC on a silicon wafer chip comprising:

• a first capacitor connected to a VCO portion and to a single buffer to cut off direct current flow between said VCO and said single buffer;
• a differential buffer;
• an internal circuit connected to said differential buffer;
• and
• a series circuit of a second capacitor and a resistor connected to said differential buffer and to said internal circuit.

A semiconductor IC having a VCO portion, a single buffer, and an internal circuit on a silicon wafer chip comprising:

• a first capacitor interconnecting said VCO portion and said single buffer to cut off direct current between said VCO portion and said single buffer;
• and
• a second capacitor interconnecting the internal circuit and said single buffer to cut off direct current between said single buffer and said internal circuit;
• said single buffer including a buffer transistor having a base connected to a resistor, the buffer transistor having an emitter connected to a grounded constant current source.

A semiconductor IC having a VCO portion, a single buffer, and an internal circuit on a silicon wafer chip comprising:

• a first capacitor interconnecting the VCO portion and the single buffer to cut off direct current between the VCO portion and the single buffer;
• and
• a series circuit of a second capacitor and a resistor, the series circuit interconnecting the single buffer and the internal circuit for separating the single buffer from the internal circuit;
• said single buffer including a buffer transistor having a base connected to a resistor, the buffer transistor having an emitter connected to a grounded constant current source.

A semiconductor IC having a VCO portion, a single buffer, and an internal circuit on a silicon wafer chip comprising:

• a first capacitor interconnecting the VCO portion and the single buffer to cut off direct current between the VCO portion and the single buffer;
• and
• a second capacitor interconnecting the single buffer with the internal circuit to cut off direct current between the single buffer and the internal circuit;
• said single buffer including a buffer transistor having a base connected to a constant voltage source (V1), and having an emitter connected to a grounded constant current source.

A semiconductor IC having a VCO portion, a single buffer, and an internal circuit on a silicon wafer chip comprising:

• a first capacitor interconnecting the VCO portion and the single buffer to cut off direct current between the VCO portion and the single buffer;
• and
• a series circuit of a second capacitor and a resistor interconnecting the single buffer and the internal circuit to separate the single buffer from the internal circuit;
• said single buffer including a buffer transistor having a base connected to a constant voltage source and having an emitter connected to a grounded a constant current source.

A semiconductor IC having a VCO portion, a single buffer, and an internal circuit on a silicon wafer chip comprising:

• a series circuit of a first capacitor and a resistor, said series circuit interconnecting the VCO portion and the differential buffer to separate the VCO portion from the single buffer;
• a second capacitor interconnecting the single buffer and the internal circuit to cut off direct current between the single buffer and the internal circuit;
• and
• a constant voltage source connected to a node of the first capacitor and the resistor;
• said single buffer including a buffer transistor having an emitter connected to a grounded constant current source.

A semiconductor IC having a VCO portion, a single buffer, and an internal circuit on a silicon wafer chip comprising:

• a series circuit of a first capacitor and a resistor, the capacitor and the resistor being connected at a node, the series circuit interconnecting the single buffer and the VCO portion to separate the VCO portion from the single buffer;
• a series circuit of a second capacitor and a resistor interconnecting the single buffer and the internal circuit to separate the single buffer from the internal circuit;
• and
• a constant voltage source connected to the node;
• said single buffer including a buffer transistor having an emitter connected to a grounded constant current source.

A semiconductor IC comprising:

• a substrate;
• a VCO portion disposed on said substrate;
• a single buffer disposed on said substrate and including a buffer transistor having a base connected to a constant current source and to a plurality of diodes, said buffer transistor having an emitter connected to a grounded resistor;
• an internal circuit disposed on said substrate;
• a first capacitor connected to said VCO portion and to said single buffer;
• and
• a second capacitor connected to said single buffer and to said internal circuit such that a signal path is formed from said VCO portion to said internal circuit, said first capacitor being arranged on said substrate to cut off direct current between said VCO portion and said single buffer, said second capacitor being arranged on said substrate to attenuate feedback signals from said internal circuit.

A semiconductor IC comprising:

• a substrate;
• a VCO portion disposed on said substrate;
• a single buffer disposed on said substrate and including a buffer transistor having a base connected to a constant current source and to a series circuit of a plurality of diodes and a resistor, said buffer transistor having an emitter connected to a grounded resistor;
• an internal circuit disposed on said substrate;
• a first capacitor connected to said VCO portion and to said single buffer;
• and
• a second capacitor connected to said single buffer and to said internal circuit such that a signal path is formed from said VCO portion to said internal circuit, said first capacitor being arranged on said substrate to cut off direct current between said VCO portion and said single buffer, said second capacitor being arranged on said substrate to attenuate feedback signals from said internal circuit.