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US 5,686,857 AGranted
Zero-crossing triac and method
AssigneeMotorola, Inc.
InventorsDavid M. Heminger, Paul G. Alonas, William M. Coppock
Life of this patent
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Abstract
A triac (100) utilizes an FET (107) to inhibit firing of a transistor (112) that forms a portion of the SCR of the triac (100). A DMOS transistor (106) is used to supply a substantially constant bias current to the transistor (107) in order to facilitate rapid turn-on of the transistor (107) around the zero-crossing of the voltage applied to the triac (100).
Claims14
A zero-crossing triac comprising:
- an SCR;
- a transistor used for inhibiting firing of the SCR;
- and
- a depletion mode DMOS transistor coupled to supply bias current to the transistor.
1 more element
A zero-crossing triac comprising:
- a high breakdown voltage transistor of a first conductivity type having a first current electrode coupled to a first terminal of the triac, a control electrode, and a second current electrode;
- a depletion mode DMOS transistor having a first current electrode coupled to the control electrode of the high breakdown voltage transistor, a control electrode, and a second current electrode coupled to the control electrode;
- an enhancement mode FET having a first current electrode coupled to a second terminal of the triac, a control electrode coupled to the second current electrode of the depletion mode DMOS transistor, and a second current electrode coupled to the second current electrode of the high breakdown voltage transistor;
- and
- a voltage limiting circuit coupled between the second terminal of the triac and the control electrode of the enhancement mode FET.
2 more elements
A method of forming a triac comprising:
- coupling a high voltage current limiter to a transistor used to inhibit firing of an SCR of the triac.
Dependencies are inferred from the claim text.