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US 5,686,850 AGranted
Signal delay method, signal delay device and circuit for use in the apparatus
AssigneeKonica Corporation
InventorsKouichi Takaki, Mitsuo Azumai, Hiroshi Ishii
Life of this patent
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Abstract
In a circuit provided in a single integrated circuit unit for use in a signal delay device, there is provided with a device in which an input signal is delayed and a plurality of delay signals, each having a different delay period from the input signal, are outputted, and a detector in which a delay signal having a specific relation with the input signal among the plurality of delay signals is detected.
Claims8
A device for providing a desired delayed signal, comprising:
- (a) delaying means for delaying an input signal to produce a plurality of delayed signals, each delayed signal having a different delay time with respect to said input signal;
- (b) phase detecting means for detecting a first delayed signal from said plurality of delayed signals by comparing phase of said plurality of delayed signals to phase of said input signal, said first delayed signal having a specific phase relation with said input signal;
- and
- (c) determining means for determining a second delayed signal from said plurality of delayed signals according to said first delayed signal, said determining means outputting said second delayed signal as said desired delayed signal.
1 more element
A circuit for providing a desired delayed signal, comprising:
- (a) delaying means for delaying an input signal to produce a plurality of delayed signals, each delayed signal having a different delay time with respect to said input signal, said delaying means including a plurality of circuit elements connected in series, said plurality of circuit elements outputting each of said plurality of delayed signals;
- (b) phase detecting means for detecting a first delayed signal from said plurality of delayed signals by comparing phase of said plurality of delayed signals to phase of said input signal said first delayed signal having a specific phase relation with said input signal;
- and
- (c) determining means for determining a second delayed signal from said plurality of delayed signals according to said first delayed signal, said determining means outputting said second delayed signal after A of said circuit elements delay said input signal, wherein A satisfies the following equation:
- A=(B/C).times.D-E/F,
- wherein A represents a number of the circuit elements,
- B represents a delayed time of said desired delayed signal,
- C represents a predetermined period according to said specific phase relation with said input signal,
- D represents a number of the circuit elements outputting said first delayed signal,
- E represents a delayed time required for passage of said input signal from input into said circuit to output as said desired delayed signal subtracting a time required for passage of said input signal through said delaying means, and
- F represents a delayed time required for passage of said input signal through one of said circuit elements, and
- wherein said determining means outputs said second delayed signal as said desired signal.
9 more elements
A device for providing a desired delayed signal, comprising:
- (a) delaying means for delaying an input signal to produce a plurality of delayed signals, each delayed signal having a different delay time with respect to said input signal;
- (b) phase detecting means for detecting a first delayed signal from said plurality of delayed signals by comparing phase of said plurality of delayed signals to phase of said input signal said first delayed signal having a specific phase relation with said input signal;
- (c) determining means for determining a second delayed signal from said plurality of delayed signals according to said first delayed signal, said determining means outputting said second delayed signal as said desired delayed signal;
- and
- (d) monitoring means for monitoring whether or not said first delayed signal is output to said determining means.
2 more elements
Dependencies are inferred from the claim text.