# US 5,686,318 A · Method of forming a die-to-insert permanent connection > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 5,686,318 A - Document ID: US5686318A - Status: Granted - Kind: A - Application number: 08/578,493 - Filed: 1995-12-22 - Granted: 1997-11-11 - Earliest claimed: 1995-12-22 - Assignees: Micron Technology, Inc. - Inventors: Warren M. Farnworth; Alan G. Wood - Web page: https://patentgrep.com/patent/US5686318A ## CPC - H10W 40/77: Auxiliary members characterised by their shape - H10W 70/66: Conductive materials thereof - H10W 72/00: Interconnections or connectors in packages - H10W 78/00: Detachable holders for supporting packaged chips in operation - H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting} - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 72/261: {Functions other than electrical connecting} - H10W 72/5522: {comprising gold [Au]} - H10W 72/5524: {comprising aluminium [Al]} - H10W 72/874: {On different surfaces} - H10W 72/877: {Bump connectors and die-attach connectors} - H10W 72/90: Bond pads, in general - H10W 72/9415: {relative to the surface, e.g. recessed, protruding} - H10W 72/9445: {Top-view layouts, e.g. mirror arrays} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract The invention disclosed herein is a semiconductor die assembly and method of making the same having a die and insert substrate that are electrically interconnected by diffusing gold bumps attached to the connecting surface of the substrate to aluminum-based bond pads on the die to form a permanent die-to-insert connection. The process for diffusing the gold bumps into the bond pads preferably occurs during a burn-in process wherein pressure and heat are applied to the die/substrate assembly without melting the gold bumps until a permanent die-to-insert substrate connection is properly made. ## Claims ### Claim 1 A method for forming a permanent chip-to-substrate electrical interconnection, comprising: forming at least one conductive connection bump of a diffusible material having a melting temperature on a surface of a substrate; placing a semiconductor chip having at least one bond pad thereon onto said at least one conductive connection bump of said substrate with said at least one bond pad in contact with said at least one conductive connection bump; applying a force to bias said substrate and said chip together; and heating said substrate and said semiconductor chip under said applied force to a temperature below said melting temperature of said diffusible material and sufficient to diffuse diffusible material of said at least one conductive connection bump in contact with said at least one bond pad into said at least one bond pad to form a metallurgical bond therewith, wherein said heating is performed for a duration of time to effect an amount of diffusion of said diffusible material of said at least one conductive connection bump into said at least one bond pad sufficient to form said permanent interconnection. ### Claim 2 A method for forming a permanent chip-to-substrate electrical interconnection comprising: forming at least one conductive connection bump of a diffusible material having a melting temperature on a surface of a substrate; placing a semiconductor chip having at least one bond pad thereon onto said at least one conductive connection bump of said substrate with said at least one bond pad in contact with said at least one conductive connection bump; applying a force to bias said substrate and said chip together at a magnitude sufficient to effect an amount of diffusion of said diffusible material of said at least one conductive connection bump into said at least one bond pad sufficient to form said permanent interconnection; and heating said substrate and said semiconductor chip under said applied force to a temperature below said melting temperature of said diffusible material and sufficient to diffuse diffusible material of said at least one conductive connection bump in contact with said at least one bond pad into said at least one bond pad to form a metallurgical bond therewith. ### Claim 3 (depends on 1) The method of claim 1, wherein the temperature of said heating is a function of the time said substrate and said semiconductor chip are exposed to said temperature. ### Claim 4 (depends on 1) The method of claim 1, further including selecting a substrate material that has a coefficient of thermal expansion that approximately matches a coefficient of thermal expansion of said chip. ### Claim 5 (depends on 4) The method of claim 4, further including selecting said substrate from a ceramic material. ### Claim 6 (depends on 1) The method of claim 1, wherein said at least one conductive connection bump comprises a plurality of bumps, said at least one bond pad comprises a plurality of bond pads, and wherein a plurality of bump-to-pad interconnections are formed substantially simultaneously. ### Claim 7 (depends on 1) The method of claim 1, further including forming said at least one conductive connection bump out of elemental gold, a gold alloy, or aluminum. ### Claim 8 (depends on 1) The method of claim 1, further including selecting said semiconductor wherein said bond pads are aluminum-based. ### Claim 9 (depends on 1) The method of claim 1, wherein said temperature is maintained for approximately 24 hours. ### Claim 10 A process for forming permanent die-to-substrate electrical interconnections during the burn-in process, comprising: inserting a substrate having a plurality of gold connection bumps thereon into a carrier; placing a die having a plurality of bond pads thereon, with the bond pads in a contacting relationship with the gold connection bumps of the substrate; attaching a clamp onto the die carrier to apply a force to bias the plurality of bond pads of the die toward the plurality of gold connection bumps of the substrate; and burning-in the die by applying heat a temperature below a melting temperature of the gold of said gold connection bumps and sufficient to form permanent metallurgical bump-to-bond pad interconnections through gold diffusion from said plurality of gold connection bumps into said plurality of bond pads. ### Claim 11 (depends on 10) The process of claim 10, further including selecting said substrate such that the coefficient of thermal expansion of said substrate is approximately the same as the coefficient of thermal expansion of said die. ### Claim 12 (depends on 10) The process of claim 10, further including burning-in the die for a sufficient time at said temperature to ensure said diffusion of said gold from said plurality of gold connection bumps sufficient to form said permanent interconnections. ### Claim 13 (depends on 10) The process of claim 10, further including electrically testing said die during said burn-in. ### Claim 14 (depends on 2) The method of claim 2, further including selecting a substrate material that has a coefficient of thermal expansion that approximately matches a coefficient of thermal expansion of said semiconductor chip. ### Claim 15 (depends on 14) The method of claim 14, further including selecting said substrate from a ceramic material. ### Claim 16 (depends on 3) The method of claim 3, wherein said at least one conductive connection bump comprises a plurality of bumps, said at least one bond pad comprises a plurality of bond pads, and wherein a plurality of bump-to-pad interconnections are formed substantially simultaneously. ### Claim 17 (depends on 2) The method of claim 2, further including forming said at least one conductive connection bump out of elemental gold, a gold alloy, or aluminum. ### Claim 18 (depends on 2) The method of claim 2, further including selecting said semiconductor chip wherein said bond pads are aluminum-based. ### Claim 19 (depends on 2) The method of claim 2, wherein said temperature is maintained for approximately 24 hours.