Preconditioning of output buffers

An output buffer circuit for preconditioning an output signal at an output node so as to provide a higher speed of operation and less ground bounce noise, comprising:

• an output buffer stage formed of a pull-up transistor and a pull-down transistor, said pull-up transistor having one of its main electrodes connected to a power supply potential and its other one of its electrodes connected to the output node, said pull-down transistor having one of its main electrodes connected to the output node and its other one of its electrodes connected to a ground potential, said output node being initially disposed at either a high logic level or a low logic level;
• predriver circuit means responsive to equalization signals for generating an output predriver signal at its output line which is at a threshold point substantially intermediate said power supply potential and said ground potential;
• feedback means being interconnected between the output node and the gate electrodes of said pull-up transistor and pull-down transistor and being responsive to precondition signals for connecting the output line of said predriver circuit means to the output node so as to drive the output node to the threshold point;
• said predriver circuit means being further responsive to data input signals for causing said output predriver signal to move either to said power supply potential or to said ground potential;
• the gate electrode of said pull-up transistor being responsive to said output predriver signal so as to move to said power supply potential when the output node is initially at the high logic level for generating a transition from the threshold point to the low logic level;
• and
• the gate electrode of said pull-down transistor being responsive to said output predriver signal so as to move to said ground potential when the output node is initially at the low logic level for generating a transition from the threshold point to the high logic level.