Data link module for time division multiplexing control systems
AssigneeSquare D Company
InventorRobert E. Riley
Life of this patent
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AssigneeSquare D Company
InventorRobert E. Riley
Estimating the term…
A programmable data link module (32) for use in a time division multiplexing control system (30) having a plurality of modules interconnected by a bus (40) for passing control signals between data link modules on a serial multiplex basis. Each module includes an integrated circuit (80) having signal conditioning circuits (180, 186 and 188) including a programmable hysteresis circuit (126), a power on reset delay circuit (190), a safety input inhibit circuit (220), a clock loss detect circuit (240), a safety output protection circuit (262), a data verifier (260), a polarity selector for a third output terminal (350), an input synchronizer (182 and 184), a combined mode/sync output terminal (110), a multiplex clock output terminal (108), a programming circuit (232) for accepting programming over the clock bus (44) and data bus (46), input/output word extender circuits (104, 106), a high voltage protection circuit (420) including a transistor (600) and a data bus integrity checker (630).
In a data link module having a data bus input terminal for receipt of control data on a time division multiplexing basis and conveying that data to at least two primary output terminals, each primary output terminal having an associated polarity, and a logic circuit for producing a combinational output signal based on a preselected logical combination of the data conveyed to at least two inputs of the logic circuit from the at least two primary output terminals, the improvement being a polarity selector circuit, comprising:
A data link module coupled to a data bus for use in a time division multiplexing control system comprising:
Dependencies are inferred from the claim text.