Wafer structure in a semiconductor device manufacturing process
AssigneeOki Electric Industry Co., Ltd.
InventorNorio Moriyama
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AssigneeOki Electric Industry Co., Ltd.
InventorNorio Moriyama
Estimating the term…
Alignment marks used in different processes are arranged on scribing lines. The scribing lines are used for cutting off individual semiconductor devices formed on a wafer, and the alignment marks have widths which are larger than widths of the scribing lines. The width of areas corresponding to positions where alignment marks are formed are larger so as to accommodate the alignment marks within the areas. A part of the area of a used alignment mark is covered with a new film so that the area is permitted to have a scribing line having a desired width every time a used alignment is generated. A new alignment mark is arranged within other areas where an alignment mark is not formed. In such an arrangement of the alignment marks, the center line of the scribing line is made clear, and the area where the semiconductor devices are formed can be made large.
A wafer structure for a semiconductor device manufacturing process, comprising:
A wafer structure for a semiconductor device manufacturing process, comprising;
A semiconductor device structure, comprising;
Dependencies are inferred from the claim text.