Lead frame for semiconductor device
OwnerSeiichi Serizawainventor
Life of this patent
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Abstract
The present invention relates to a lead frame for the formation of a frame structure of an integrated circuit, more particularly, to a lead frame, for a semiconductor device, having a structure possessing excellent bondability, solder wettability, and Ag paste adhesion. A lead frame for a semiconductor device comprises a lead frame substrate; a first intermediate layer, of a Ni plating or a Ni alloy plating, provided on the lead frame substrate; a second intermediate layer, of a Ag plating or a Ag alloy plating, provided on the first intermediate layer; and an outermost layer, of a Pd plating or a Pd alloy plating, provided on the second intermediate layer, wherein the Ag alloy constituting the second intermediat layer is at least one alloy selected from Ag-Co, Ag-Fe, Ag-Pd, Ag-Au, and Ag-Pt.
Claims5
A lead frame for a semiconductor device, comprising:
- a lead frame substrate;
- a first intermediate layer, of a nickel (Ni) plating or a nickel (Ni) alloy plating having a thickness of 0.01-10 .mu.m, provided on the lead frame substrate;
- a second intermediate layer, of a silver (Ag) plating or a silver (Ag) alloy plating having a thickness of 0.005-10 .mu.m, provided on the first intermediate layer;
- and an outermost layer, of a palladium (Pd) plating or a palladium (Pd) alloy plating having a thickness of 0.005-10 .mu.m, provided on the second intermediate layer.
Dependencies are inferred from the claim text.