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US 5,684,312 AGranted
Solid-state imaging device having contact buffer layer interconnecting gate and vertical scan line
AssigneeSony Corporation
InventorKazuya Yonemoto
Life of this patent
Estimating the term…
Abstract
V-shaped contact buffer layers of polycrystalline silicon are disposed between ring-shaped gate electrodes of thin-film polycrystalline silicon of amplifying pixel transistors and vertical scanning lines. The contact buffer layers and the ring-shaped gate electrodes are connected to each other by contacts, and the contact buffer layers and the vertical scanning lines are connected to each other by contacts which are positionally displaced from the above contacts. The channel length of the ring-shaped gates is rendered constant in all areas, and a potential shift is prevented from occurring in gate contacts for thereby avoiding operation characteristic degradations of the pixel transistors.
Claims20
A solid-state imaging device comprising:
- a semiconductor substrate having formed therein source and drain regions of a MOS transistor, said MOS transistor being a pixel transistor for storing a signal charge converted from incident light applied thereto, said drain being configured to be connected to a power supply, said source being configured for outputting a signal representing the signal charge;
- first, second, third and fourth insulating interlayers formed on the semiconductor substrate in order, with the first insulating interlayer formed on the semiconductor substrate;
- a transparent gate electrode of the pixel transistor formed within the first insulating interlayer, said transparent gate electrode being configured for applying a drive voltage to the pixel transistor;
- a wiring line associated with said pixel transistor having a horizontal portion formed within said fourth insulating interlayer and a vertical portion extending from said fourth insulating interlayer down to said second insulating interlayer, said wiring line being horizontally displaced from the gate electrode;
- a contact buffer layer electrically interconnecting the gate electrode and the wiring line, the contact buffer layer having a horizontal portion extending within said second insulating interlayer to said wiring line and having a vertical portion extending from said second insulating interlayer down to said first insulating interlayer to said gate electrode, said contact buffer made of a non-aluminum material that does not chemically react with said gate electrode.
2 more elements
A solid-state imaging device comprising:
- a pixel transistor for storing a signal charge photoelectrically converted from incident light applied thereto, said pixel transistor having a thin-film silicon transparent gate electrode for applying a drive voltage to the pixel transistor, a drain connected to a power supply terminal, and a source for outputting a signal representing the signal charge;
- a vertical scanning line associated with said pixel transistor, said vertical scanning line being horizontally displaced from said gate electrode;
- and
- a contact buffer layer interconnecting said gate electrode and said vertical scanning line, said contact buffer layer being made of a non-aluminum material so as to not chemically react with said gate electrode.
1 more element
A solid-stale imaging device comprising:
- a plurality of pixel transistors arranged in a matrix, for storing signal charges photoelectrically converted from incident light applied thereto, each of said pixel transistors having a thin-film silicon transparent gate electrode for applying a drive voltage to the pixel transistor, a drain connected to a power supply terminal, and a source for outputting a signal representing the signal charge;
- a plurality of vertical scanning lines associated with respective rows of pixel transistors, each of said vertical scanning lines being horizontally displaced from its respective gate electrode;
- a plurality of vertical signal lines associated with respective columns of the pixel transistors;
- and
- connecting means for interconnecting each of said vertical scanning lines and corresponding ones of said gate electrodes, said connecting means being made of a non-aluminum material so as not to chemically react with the respective gate electrode.
2 more elements
A solid-state imaging device comprising:
- a plurality of pixel transistors arranged in a matrix, for storing signal charges photoelectrically converted from incident light applied thereto, each of said pixel transistors having a transparent gate electrode for applying a drive voltage to the pixel transistor, a drain connected to a power supply terminal, and a source for outputting a signal representing the signal charge;
- a plurality of vertical scanning lines associated with respective rows of said pixel transistors, each to said vertical scanning lines being horizontally displaced from its respective transparent gate electrode;
- a plurality of vertical signal lines associated with respective columns of said pixel transistors;
- and
- respective connecting means for interconnecting each of said vertical scanning lines and corresponding ones of said transparent gate electrode, each of said connecting means being made of non-aluminum material so as not to chemically react with its respective transparent gate electrode, each of said connecting means being positioned between its respective vertical scanning line and vertical signal line and its transparent gate electrode.
2 more elements
Dependencies are inferred from the claim text.