Method of forming raised source/drain regions in a integrated circuit

A method of forming a semiconductor integrated circuit, comprising the steps of:

• forming a gate electrode over a gate oxide overlying a substrate, wherein the gate electrode is electrically isolated by a plurality of field oxide regions,
• forming a capping layer over the gate electrode;
• forming LDD regions in the substrate adjacent to the gate electrode;
• forming sidewall spacers adjacent to the gate electrode and capping layer;
• depositing a polysilicon layer over the capping layer, substrate and field oxide regions, wherein the lowest most portion of the upper surface of the polysilicon layer is above the upper surface of the field oxide regions;
• forming a planar sacrificial layer over the polysilicon layer having a 1:1 etch ratio with the polysilicon layer;
• performing an etchback of the sacrificial and the polysilicon layers exposing the upper surface of the field oxides;
• and
• doping the polysilicon.