Delay generator for reducing electromagnetic interference having plurality of delay paths and selecting one of the delay paths in consonance with a register value

A delay generator, which is located along a plurality of signal lines, for selectively providing an alterable delay time for signals transmitted on said plurality of signal lines, said alterable delay time being the same on each of said plurality of signal lines, wherein said alterable delay time is set by said delay generator to reduce electromagnetic interference within a product based upon an electromagnetic interference measurement for said product, said delay generator comprising:

• delay means, connecting a plurality of data input lines and having a plurality of delay paths for the generation of alternative delay times;
• a register for storing a digital value that is held by a predetermined number of bits;
• and
• selection means for selecting and thereafter providing one of said plurality of delay paths for provision of said alterable delay time on said plurality of signal lines in consonance with said digital value.