US 5,675,766 A · Network interface card for reading dynamically changing data

Abstract

A mechanism is provided that allows partial reading of storage locations, such as statistics counters, by providing a temporary read data storage latch on a peripheral device. The latches are updated with fresh data from an address storage location whenever any one of the following conditions is met: 1. The address accessed by the host differs from the previous access; 2. The host has written to the device prior to the current read; or 3. When accessing the same location sequentially, one or more bytes of the second read have already been read by the host in a previous read. These rules allowed for byte- or word-wise write/read/verify cycles; byte- or word-wise reads of dynamic data; and byte, word, or double-word with polling of registers. With this mechanism, it is impossible for the host to erroneously end up with 01ff (hex) as it reads a four byte register a byte at a time when the register increments from 00ff to 0100 between the sequential reads.

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Claims3

Dependent claims

A network interface system suitable for connecting a host data processing system to a network and for providing the host with a changing network statistic in response to a host read statistic instruction comprising:

a memory including a host addressable storage location for said changing network statistic, said statistic stored as a first section and a second section;
a network interface processor, having a write connection coupled with said memory, a host connection, a network connection, and a partial read connection, the network interface processor further comprising;
means for generating and writing said changing network statistic to said storage location independent of the host data processing system:
said means for generating and writing said charting network statistic including
a statistical module monitoring said network connection and supplying the changing network statistic to said write connection, whereby said changing network statistic is stored in said storage location as said first and said second sections;
a partial read store, coupled to said memory and to said partial read connection to upload said changing network statistic from the addressed storage location and to supply at least one of said sections of said statistic from said partial read store to said host connection;
a control unit, coupled to said partial read store to receive host instructions, and comprising;
means for detecting successive partial host read statistic instructions, each statistic instruction addressed to one of said sections of said storage location, said means for detecting successive partial host read statistic instructions including
an address store having as input a current host instruction address and having as output a prior host instruction address when said prior host instruction is a partial read statistic instruction and having as output zero when said prior host instruction is a write:
an address comparator having as inputs said current host instruction address and said address store output and having an enabled output condition when the output of said address store and said current host instruction address match indicating a successive read of at least two accesses by the host to said storage location and a disabled output condition when there is no match and
means to direct said partial read store to supply to said host connection without uploading from said memory when said sequential instructions are directed to different ones of said sections, and to direct said partial read store to upload from said memory and to supply to said host connection when said successive partial host read statistic instructions are directed to same ones of said sections, said means to direct said partial read store includes an update signal controlling the uploading of said partial read store and which is in the enabled condition to cause said uploading when the output condition of said address comparator is disabled and which is in the disabled condition when the output condition of said address comparator is enabled.

8 more elements

Dependencies are inferred from the claim text.

Description7,496 words

Summary899 words

#1. Field of the Invention

#The present invention relates to apparatus allowing partial reads of storage locations containing data that may change between sequential reads. For instance, for a storage location storing a double word, the system of the present invention allows byte, word, or double word accessing of the storage location.

#2. Description of Related Art

Brief description of the drawings8 figures

#FIG. 1 provides a basic block diagram of a system according to the present invention for allowing partial reads of dynamically changing data.

#FIG. 2 is a block diagram of a preferred implementation of a host system and network interface device which implements the partial read mechanism of the present invention.

#FIG. 3 is a block diagram of the network interface processor of FIG. 2 implementing the partial read mechanism of the present invention.

Detailed description6,401 words

#A detailed description of a preferred embodiment of the present invention is provided with respect to the figures.

#FIG. 1 provides a generic diagram of a system implementing the present invention. The system includes a host central processing unit 10, and other host devices 11 coupled to a host system bus 12. Also coupled to the host system bus is a peripheral device, generally 13, which includes a dynamically changing store 14, a host read register 15, and host partial read logic 16. The dynamically changing store 14 is a plurality of bytes wide (greater than N). For instance, it may be a double word (four byte) memory, including one or more addressable storage locations. The read store 15 is of the same width as the dynamically changing store 14 in the preferred system. The host partial read logic 16 allows the host to read the data in the host read store 15 one byte or a plurality of bytes at a time, while preventing updates of the read store 15 between sequential reads of different bytes of the same storage location.

#Although in the example, the dynamically changing store is segmented on byte boundaries, a byte may be more generically referred to as a section of the dynamically changing storage location, including any number of bits.

Facts

Application

08/449,827Filed 24 May 1995 · division

Priority

17 Feb 1993

Granted

7 Oct 1997

Term ended

7 Oct 2014

Estimated · how

Pre-1995 term; greater of 17 years from grant or 20 years from filing when eligible. Maintenance-fee lapses, terminal disclaimers and statutory extensions have not been checked. The continuity chain may be incomplete; this is not an enforceability determination.

Classification4 codes

G06F 13/385
Using universal interface adapter: for adaptation of a particular data processing system to different peripheral devices
G06F 12/04
Addressing or allocation; Relocation: addressing variable-length words or parts of words
G06F 13/126
Where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine: and has means for transferring…
G06F
Computing and data processing

Network interface card for reading dynamically changing data

Life of this patent

Network interface card for reading dynamically changing data

Life of this patent

Life of this patent

Abstract

Drawings

Drawings

Claims3

Description7,496 words

Drawings

Classification4 codes

Life of this patent

Description7,496 words