US 5,675,569 A · Readback circuit for an optical information reading and recording apparatus

Abstract

A recorded signal reproduction circuit in an optical disc information reading and recording apparatus converts a recorded signal recovered from an optical disc to PR (1, 2, 1) characteristics through a equalizer circuit, digitizes it through an A/D converter and at the same time also generates a clock signal synchronized in phase with the equalizer circuit output signal by using a binary edcoder circuit and a PLL circuit. This clock signal is then provided to an A/D converter as the sampling clock. The A/D converter output signal is then decoded to the original channel bit stream based on the clock signal. Because the equalizer circuit output signal is provided to both the binary encoder/PLL circuit and the A/D converter together, additional circuity for converting signals into a binary series of pulses is unnecessary and reduction of circuit scale is possible. Moreover, in case of a change-over in the frequency characteristics of the equalizer circuit, due to a change in recording and reproduction frequency, the change-over will not affect the phase relationship between an input signal to the A/D converter and a sampling clock. In addition, it becomes simple to adjust this phase relation.

Claims14

Dependent claims

A recorded signal readback circuit of an optical information reading and recording apparatus, comprising:

an equalizer circuit for equalizing a readback signal from a recording medium to PR (1, 2, 1) characteristics in waveform, said readback signal comprising a channel bit stream of recorded information wherein said information is encoded such that sequential channel bits within the bit stream have a minimum reverse interval of not less than two channel bits;
a binary encoder circuit, said binary encoder circuit converting an output signal of said equalizer circuit into a series of binary pulses, wherein said binary encoder circuit comprises:
a high frequency band emphasis circuit that increases a gain of the output signal of said equalizer circuit at high frequencies, an envelope limit detecting circuit that detects positive and negative envelope limits of an output signal envelope of said high frequency band emphasis circuit, a median value detector circuit that calculates a median value between said positive and negative envelope limits, and a comparator circuit that compares the output signal of said equalizer circuit with the median value;
said readback circuit further comprising a correction circuit for amending the output signal of said equalizer circuit in response to said median value;
a phase-locked-loop (PLL) circuit for outputting a clock signal synchronized in phase with the series of binary pulses;
an A/D converter for digitizing an output signal of said equalizer circuit in response to said clock signal;
and
a Viterbi decoder, said decoder decoding an output value from said A/D converter using a maximum likelihood decoding approach to reproduce said channel bit stream devoid of undesirable low frequency offset.

5 more elements

A recorded signal readback circuit of an optical information reading and recording apparatus comprising:

an equalizer circuit for equalizing a readback signal from a recording medium to PR (1, 2, 1) characteristics in waveform, said readback signal comprising a channel bit stream of recorded information wherein said information is encoded such that sequential channel bits within the bit stream have a minimum reverse interval of not less than two channel bits;
a high pass filter for cutting off a low frequency band of an output signal of said equalizer circuit;
an adder circuit connected to receive an output of said high pass filter;
a comparator for comparing an output of said adder circuit with a predetermined value so as to output a series of pulses;
a low pass falter connected between an output of said comparator and an input of said adder circuit, said low pass filter providing low frequency signal components of said readback signal to the output of said high pass filter by way of said adder circuit to inhibit envelope fluctuation;
a phase-locked-loop (PLL) circuit for outputting a clocking signal that is synchronized in phase with said series of pulses of said comparator;
an A/D converter for digitizing an output signal of said adder circuit based on said clocking signal;
and
a Viterbi decoder, said decoder decoding an output value from said A/D converter to reproduce said channel bit stream devoid of undesirable low frequency offset.

6 more elements

Dependencies are inferred from the claim text.

Readback circuit for an optical information reading and recording apparatus

Life of this patent

Readback circuit for an optical information reading and recording apparatus

Life of this patent

Abstract

Claims14