Method of forming a database that defines an integrated circuit memory with built in test circuitry

A method of forming a database that defines an integrated circuit having a memory with test circuitry associated therewith, comprising:

• providing a plurality of databases that individually define a functional operation of a circuit block and its external connections, including one or more such databases for each of a memory circuit block, a built in self test (BIST) interface to the memory circuit block, and a plurality of BIST controller blocks, the providing of the plurality of databases including maintaining in separate files portions of the individual databases that define the functional operation of the circuit block and its external connections,
• identifying a type of memory circuit block to be utilized, and thereby to identify one of the plurality of databases that defines a memory block of the identified type,
• selecting a BIST interface to be combined with the memory circuit block, and thereby to select one of the plurality of databases that defines the selected BIST interface,
• defining a memory module by designating (a) interconnections between the external circuit block connections of the identified memory database and the identified BIST interface database, and (b) external connections of the memory module,
• identifying two or more of the plurality of BIST controller blocks to be combined to form a BIST controller, and thereby to identify two or more of the plurality of databases that define BIST controller blocks,
• defining the BIST controller by designating (a) interconnections between the external circuit block connections of the identified two or more databases that define BIST controller modules, and (b) external connections of the BIST controller,
• wherein the defining of the memory module and the defining of the BIST controller include using the files of external block connections without any substantial modification to the files that define the functional operation of the circuit blocks, and
• designating interconnections between the defined memory module and the defined BIST controller, thereby to form a database that defines an integrated circuit having a memory with test circuitry associated therewith.