Hardware retry trap for millicoded processor
AssigneeInternational Business Machines Corporation
InventorsCharles Franklin Webb, Mark Steven Farrell, Scott Barnett Swaney
Life of this patent
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Abstract
Retry trap in the processor system detects the occurrence of a hardware retry during a millicode routine. In operation, millicode resets the retry trap to "O" at the start of a millicode sequence that is sensitive to a retry operation being at some stage of the millicode sequence. The millicode routine tests the retry latch state at one or more points in the sequence to determine if a retry has occurred since the start of the sequence, which is sensitive to a retry operation. The action taken in response to a determination that a retry operation has occurred depends upon the type of potential damage to the system state as a result of the occurrence of the retry operation during the millicode sequence.
Claims12
In a pipelined computer processor, which executes a relatively simple instruction set in a hardware controlled execution unit and executes a relatively complex instruction set in a milli-mode architected state with a millicode sequence of simple instructions in said hardware controlled execution unit, a method for responding to a processor hardware retry operation occurring during processor execution of a millicode instruction sequence, including the steps of:
- setting, when a retry operation is performed by the processor, a retry register latch in a register that can be written to and read by millicode instructions;
- resetting the retry register latch with a millicode instruction sequence at the beginning of said millicode instruction sequence if said millicode instruction sequence is sensitive to a hardware retry operation during said millicode instruction sequence;
- testing the state of said retry register latch during execution of said millicode instruction sequence to determine if said retry register latch has been set during execution of said millicode instruction sequence;
- and
- initiating an action response if the testing step indicates the retry register latch has been set.
Dependencies are inferred from the claim text.