Storage system with a flash memory module
AssigneeKabushiki Kaisha Toshiba
InventorHiroshi Sukegawa
Life of this patent
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Abstract
In a storage system using flash EEPROMs, a memory module is composed of a plurality of memory blocks arranged in units of in-unison erase blocks. Some of the memory blocks are used as management tables storing management information for managing address allocation of each memory block and the number of rewrites for each memory block. A memory controller reads the management information from the management table at the system start-up, and based on the management information, controls the read/write access to each memory block.
Claims33
A storage system including a plurality of memory block means, said memory block means comprising rewritable nonvolatile memory devices arranged in units of in-unison erase blocks, the storage system comprising:
- a plurality of first memory block means for reading and writing by a host system, each of said first memory block means having a changing location in said storage system;
- a second memory block means for storing address conversion information for translating accesses to each of said first memory block means, the second memory block means having a changing location in said storage system;
- and
- a third memory block means for storing an address of the second memory block means, the third memory block means having a fixed location in said storage system.
A storage system having a plurality of memory blocks, each of said memory blocks comprising rewritable nonvolatile memory devices arranged in units of in-unison erase blocks, the storage system comprising:
- a plurality of first memory blocks for storing data for reading and writing by a host system, each of said first memory blocks storing write count data, the write count data comprising low-order part data of write frequency information indicating a frequency that data is rewritten in a corresponding one of the first memory blocks;
- and
- a second memory block for storing master management information including high-order part data of the write frequency information for all of the first memory blocks, the high-order part data being written less frequently than the low-order part data.
A storage system including a plurality of memory block means, each of said memory block means comprising
- rewritable nonvolatile memory devices arranged in units of in-unison erase blocks, the storage system comprising:
- a plurality of first memory block means for storing user's data and address conversion information for translating accesses to said user's data, the first memory block means having a changing location in said storage system;
- and
- a second memory block means for storing an address of the address conversion information, the second memory block means having a fixed location in said storage system.
A storage system including a plurality of memory block means, each of said memory block means comprising rewritable nonvolatile memory devices arranged in units of in-unison erase blocks, the storage system comprising:
- a plurality of first memory block means including a second memory block means for storing user's data and a third memory block means for storing address conversion information for translating accesses to said user's data, the first memory block means having a changing location in said storage system;
- and
- a fourth memory block means for storing an address of the address conversion information, the fourth memory block means having a fixed location in said storage system.
A memory having a plurality of memory blocks, comprising:
- a plurality of first memory blocks for storing data, the first memory blocks having address locations that change within the memory;
- a plurality of second memory blocks for storing address information representing the address locations of the first memory blocks, the second memory blocks having address locations that change within the memory;
- and
- a third memory block for storing address information representing the address locations of the second memory blocks, the third memory block having a location that is fixed within the memory.
A storage system comprising:
- a plurality of first memory blocks for reading and writing data by a host system;
- a plurality of second memory blocks for storing address tables containing address locations of the first memory blocks, each of the second memory blocks storing count data indicating a number of times the corresponding address table has been written into or erased, the second memory blocks having address locations that change within the storage system;
- and
- a third memory block for storing an address table containing the address locations of the second memory blocks, the third memory block having an address location that is fixed within the storage system.
A method for accessing a memory block of a memory device, the memory device including a plurality of first memory blocks having changing locations within the memory device and a second memory block having a fixed location within the memory device, the method comprising the steps of:
- reading a current address location for one of the first memory blocks from a first table stored in the second memory block at a predetermined fixed address in the memory device;
- reading a current address location for another one of the first memory blocks from a second table stored in the one first memory block at the address location from the first memory table;
- and
- accessing the other first memory block at the address location read from the second table.
A computer system comprising:
- a main processor;
- a memory controller connected to the main processor;
- and
- a memory system, connected to and controlled by the memory controller, including a plurality of memory block means, the memory block means comprising
- a plurality of first memory block means for reading and writing by the main processor via the memory controller, each of the first memory block means having a changing location within the memory system,
- a second memory block means for storing address conversion information for translating accesses to each of the first memory block means by the main processor, the second memory block means having a changing location within the memory system, and
- a third memory block means for storing an address of the second memory block means, the third memory block means having a fixed location in the memory system.
A method for tracking a rewrite history of a plurality of first blocks and a second block of a memory device, comprising the steps of:
- storing first rewrite count data in each of the first blocks, the first rewrite count data indicating a number of times a corresponding one of the first blocks has been written into or erased;
- storing a portion of the first rewrite count data in the second block;
- updating the first rewrite count data in one of the first blocks when performing one of a write operation and an erase operation in the one first block;
- and
- updating the portion of the first rewrite count data in the second block when the first rewrite count data in the one first block exceeds a predetermined number.
A method for leveling out a number of writes and erases among a plurality of memory blocks of a storage device, the storage device having a plurality of first memory blocks and at least one second memory block, the method comprising the steps of:
- storing count data in each of the first memory blocks, the count data indicating a number of times a corresponding first memory block has been written into or erased;
- storing high-order count data, corresponding to high-order bits of the count data, for each of the first memory blocks in the second memory block;
- reading the high-order count data from the second memory block;
- comparing the high-order count data for each of the first memory blocks;
- and
- transferring contents of one of the first memory blocks to another first memory block when the high-order count data corresponding to the one first memory block is at least a predetermined amount larger than the high-order count data corresponding to the other first memory block.
Dependencies are inferred from the claim text.