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AssigneeFujitsu Limited
InventorsFuminori Yumitori, Yasuhiro Fujii
Estimating the term…
The present invention relates to a high-speed data transmission system for efficiently transmitting large amounts of data within short periods of time. A DRAM comprises at least a memory cell, sense amplifiers, a /RAS signal input, a word line (WL) boost signal generator, a sense amplifier control signal-generator, and a sense amplifier drive signal-generator, wherein the memory cell is constituted by a plurality of banks, the sense amplifiers are provided in a corresponding plurality of numbers, the sense amplifier control signal-generator are provided in a plurality of numbers to correspond to the plurality of banks, and provision is made of external sense amplifier activating signal terminals which are connected to the sense amplifier control signal-generator in order to activate the sense amplifiers independently of the /RAS signal.
A dynamic random access memory (DRAM) comprising:
In a dynamic random access memory (DRAM) which comprises at least a memory cell means, sense amplifiers coupled to said memory cells means, a row address strobe signal input means, a word line (WL) boost signal-generating means, a sense amplifier control signal-generating means and a sense amplifier drive signal-generating means coupled to said sense amplifier control signal generating means, in order to read the cell data by activating the word lines (WL) by utilizing row address strobe signals, wherein said memory cell means is constituted by a plurality of banks, said sense amplifier control signal-generating means are provided in a plurality of numbers to correspond to the plurality of banks, said word line (WL) boost signal-generating means is so constituted as to activate the word lines (WL) by a one shot pulse in synchronism with the rising and falling edges of the row address strobe signals, and said sense amplifier control signal-generating means is so constituted as to activate the sense amplifiers in synchronism with bank address signals that are derived from said row address strobe signals.
A dynamic random access memory (DRAM) comprising:
Dependencies are inferred from the claim text.