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US 5,673,007 AGranted
Frequency synthesizer having PLL receiving filtered output of DDS
AssigneeNEC Corporation
InventorAkihiro Kirisawa
Life of this patent
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AssigneeNEC Corporation
InventorAkihiro Kirisawa
Estimating the term…
A frequency synthesizer includes a phase adder, a read only memory, a D/A converter, a bandpass filter, a low-pass filter, a phase comparator, a loop filter, a voltage controlled oscillator, and a frequency divider. The phase adder adds frequency setting data and output data of a plurality of bits every input clock to set the addition result as new output data. The read only memory outputs sine wave data on the basis of the output data from the phase adder. The D/A converter D/A-converts the sine wave data from the read only memory. The bandpass filter (particularly a switched capacitor filter) receives an output from the D/A converter and has a pass frequency which changes in accordance with the reference frequency of an output sine wave signal. The low-pass filter removes a high-frequency component from an output from the bandpass filter. The phase comparator compares the phase of an output from the low-pass filter with the phase of a frequency-divided output of the sine wave signal. The loop filter smooths an output from the phase comparator. The voltage controlled oscillator outputs the sine wave signal using an output from the loop filter as a control voltage. The frequency divider frequency-divides an output from the voltage controlled oscillator to output a result to the phase comparator.
A frequency synthesizer comprising:
A frequency synthesizer comprising:
A frequency synthesizer comprising:
Dependencies are inferred from the claim text.