Method and apparatus for minimizing torque ripple in a DC brushless motor using phase current overlap

In a system having a motor, the motor having a plurality of windings, a method of energizing the windings for reducing motor torque ripple, comprising the steps of:

• energizing a first winding of the motor to generate a first phase current;
• energizing a second winding of the motor to generate a second phase current;
• and,
• overlapping the first and second phase currents by a preselected time to reduce motor torque ripple wherein the motor has a speeds said overlapping step including the substep of determining the preselected time as a function of the motor speed.

In a system having a motor, the motor having plurality of windings, a method of energizing the windings for reducing motor torque ripple, comprising the steps of:

• energizing a first winding of the motor to generate a first base current;
• energizing a second winding of the motor to generate a second phase current;
• and,
• overlapping the first and second phase currents by a preselected time to reduce motor torque ripple wherein said overlapping step includes the substep of determining the preselected time as a function of motor torque variation.

A system for controlling a motor to reduce motor torque ripple, the motor having a plurality of windings each carrying a respective winding current comprising:

• means for energizing a first one of said winding to generate a first winding current during a first interval;
• means for energizing a second one of said windings to generate a second winding current during a second interval;
• and,
• means for overlapping said first and second intervals for a preselected time such that a variation of motor torque is minimized wherein each winding has a respective nominal turn-on and turn-off times, and wherein said overlapping means includes means for delaying deenergization of said first winding relative to said nominal first winding turn-off time so that said first and second intervals overlay by said preselected time, said delaying means includes means for varying said preselected time as a function of a speed control signal.

A motor system, comprising:

• a motor having a plurality of windings each carrying a respective phase current wherein the sum of said phase currents is known to be proportional to motor torque, said motor having a shaft rotatable upon energization of said windings;
• means for energizing a first one of said windings to generate a first phase current during a first interval;
• means for energizing a second one of said windings to generate a second phase current during a second interval;
• and,
• means for reducing torque ripple of said shaft by overlapping said first and second intervals by a preselected time such that a variation of motor torque is minimized, wherein each winding has a respective nominal turn-on and turn-off times, and wherein said reducing torque ripple means includes means for delaying deenergization of said first winding relative to said nominal first winding turn-off time so that said first and second intervals overlap by said preselected time, said delaying means includes means for varying said preselected time as a function of a speed control signal.

An apparatus for controlling a motor, the motor having a plurality of windings, comprising:

• position sensing logic for generating a motor rotor position signal;
• phase commutation logic responsive to said motor rotor position signal for generating first and second gate drive signals, said first and second gate drive signals being operative to energize a respective winding of the motor when active to generate respective first and second currents, each gate drive signal being active during respective non-overlapping intervals;
• and,
• an overlap circuit having transition logic to detect a transition of an active state between said first and second gate drive signals and generate a trigger signal in response to said detected transition, said overlap circuit further having a delay circuit responsive to said trigger signal for generating a delay signal, said transition logic being responsive to said delay signal for overlapping by a preselected time the time in which said first and second gate drive signals are active.